Intel 536EX manual 1.2V.90/V.92 and V.34 Data Modes, Intel Confidential, Introduction

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Figure 2. VxD Mini Port Driver Block Diagram

Introduction

When the controllerless chipsets are used with MS-DOS* applications, however, a UART emulation is required. Intel provides an additional driver called Intelsdb.VxD, which includes a UART emulation. Please refer to Section 9.1, “UART Emulation in the Controllerless Modem” on page 92 for an explanation of the 536EX UART emulation. The Intelsdb.VxD driver interacts directly with the VCOMM.VxD driver using the Win16 and Win32 Communication APIs.

Figure 2. VxD Mini Port Driver Block Diagram

NON-SYSTEM

 

 

VIRTUAL MACHINE

SYSTEM VIRTUAL MACHINE

MS-DOS SHELL APPLICATION

OR DRIVER

 

 

MS-DOS

WINDOWS

APPLICATION

APPLICATION

 

TAPI

Win 16

 

Unimodem

COMM.DRV

Intelsdb.VXD

VCOMM.VXD

 

HaM Port Driver

 

Interrupt Services

 

Chipset Hardware

1.2V.90/V.92 and V.34 Data Modes

The 536EX chipset defaults to the V.90 or V.92 mode depending on the driver version. The V.90/ V.92 mode allows receive data rates of up to 56,000 kbps over the PSTN (public switched telephone network) only in connections with equipment-compatible ISPs (Internet Service Providers); however, FCC regulations limit receive speeds to 53,333 kbps due to excessive power demands at higher speeds. In modem-to-modem connections, V.90/V.92 mode falls back to V.34 mode in both the transmit and receive directions. The chipsets implement all data rates and modulation schemes for ITU-T (International Telecommunications Union-Telecommunications) standards V.34, V.32 bis, V.32, V.22 bis, V.22, V.21, Bell 212A, and Bell 103.

536EX Chipset Developer’s Manual

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Intel Confidential

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Contents 536EX Chipset Developer’s ManualJanuary 536EX Chipset Developer’s Manual Intel ConfidentialContents ContentsFigures Tables Date Revision HistoryRevision Description1.1Controllerless Modem Driver Overview Introduction1.1.2Windows 95 and Windows Figure 1. WDM Driver Block DiagramUser applications Kernel - ring01.2V.90/V.92 and V.34 Data Modes Figure 2. VxD Mini Port Driver Block Diagram1.3Modem Connection Overview Table 1. DTE-to-DCEData Rates for Each Mode Table 2. DCE-to-DCEData Rates for Each ModeTable 3. DCE-to-ISPData Rates for V.90 Mode Table 4. DTE-ModemData Rate Response Codes 1.4.1Sending Commands1.4.3Dial Modifier 1.4.2AT Escape SequencesAT Command Summary Tables AT Command Summary TablesTable 5. Data Mode Command Summary Table 5. Data Mode Command Summary Continued Result code type Table 5. Data Mode Command Summary Continued Generate data mode calling tone Table 6. V.44/V.42/V.42 bis MNP Command Summary Intel Confidential Table 8. Fax Class 1 Command Summary Table 7. Fax Identity Command SummaryTable 10. Voice DTE→DCE Character Pairs Table 9. IS-101Voice Command SummaryTable 11. Voice DTE←DCE Character Pairs Table 10. Voice DTE→DCE Character Pairs ContinuedTable 11. Voice DTE←DCE Character Pairs Continued Table 12. Dial ModifiersTable 13. S-RegisterSummary Table 13. S-RegisterSummary Continued Data Mode AT COMMANDS Data Mode AT COMMANDSFigure 3. Example of a Remote Connection Table 14. Data Reporting Wn MappingATW0 •ATW2Data Mode AT COMMANDS +FMFR?, +FMDL?, +FREV? 3.6Online Command Mode Escape Codes, On 3.7Hanging Up Hn, S10, Zn, &D23.8Modem-to-ModemConnection Data Rates Data Mode AT COMMANDS +PCW=0 +PMH=0+VCID=1 +++ATData Mode AT COMMANDS hook to connect the call. Now you can answer the phone and talk. After completing your voice conversation, the modem will issue another +PMHF and ATO command to initiate a Quick Connect. If the server rejects the request to go on hold, the user can stay on line ATO command issued or disconnect from his initial data connection ATH command issued Table 16. Supported Modulation Types 3.9.1Local Analog Loopback AT&T1 3.9Diagnostic Testing S18, &TnLOCAL MODEM 3.9.2Local Analog Loopback With Self-TestAT&T8Figure 6. Local Analog Loopback Test Local Modem or Test ModemLicensing Requirements for Hayes Escape Sequence 3.10.1Time-IndependentEscape Sequence<char1><char2><char3><AT command><contents of S3> Formatchar1 = char2 = char3 = escape character S2 3.10.2Hayes* Escape Sequence Table 18. Data Mode Command DescriptionsData Mode AT COMMANDS Sn=x Data Mode AT COMMANDS Intel Confidential536EX Chipset Developer’s Manual NOTE: An asterisk * denotes the factory-defaultsetting AT&V0 Data Mode AT COMMANDS Command Default IndicationDefinition 1, 0, Data Mode AT COMMANDS +ESR +ETBM1, 1, +GSN +GMR+IFC +ILRR=mIntel Confidential Description <carrier>+MS=m see ‘m’+PMHF +PHSW=<value> +PMHRData Mode AT COMMANDS Error Correction and Data Compression4 Error Correction and Data CompressionTable 19. Operating Modes NOTES Table 20. Resulting +ES Connection TypesError Correction and Data Compression Intel Confidential536EX Chipset Developer’s Manual Error Correction and Data Compression direction +DR=m+DS=m <max string>+EFCS=m 3768+ER=m +ES=m 5.1Fax Identity Commands Fax Class 1 AT Commands5.2Fax Class 1 Commands Fax Class 1 AT CommandsTable 23. <mod> Selection Table Figure 8. T.30 HDLC Frame Format Table 24. Fax Mode Command Descriptions +FRH=m Table 24. Fax Mode Command Descriptions ContinuedRefer to Table 23 on page shown in Table 23 on page+FTH=m IS-101Voice Mode AT Commands IS-101Voice Mode AT CommandsTable 25. Voice Mode Command Descriptions 6.1DTMF Detection Reporting6.2Relay Control m = <deassert>, <assert> +FLO=m+VDR=m m=<enable>, <report>+VEM=m m = <mask>Intel Confidential +VIP +VLS=m Preassigned Voice I/O LabelsRelay/Playback Control: cont Voice I/O Primitive Codes+VRX m = <sds>, <sdi>+VSD=m m= <cml>, <vsr>, <scs>, <sel> +VSM=mTransmission: Range: +VSP=m Compression Method Selection: contfactory default is ‘0’ none +VTS=mDefault CommandDescription DTMF and Tone Generation: contS-Registers Table 26. S-RegisterCommand DescriptionsS-Registers Intel Confidential S-Registers536EX Chipset Developer’s Manual Intel Confidential S-Registers536EX Chipset Developer’s Manual Intel Confidential S-Registers536EX Chipset Developer’s Manual Intel Confidential Caller ID Caller IDTable 27. Caller ID Tags for Formatted Reporting RING RING RING DATE = TIME = NMBR = NAME = DOE JOHN MESG =<DLE> R NMBR =UART Parallel Host Interface 16C450/16C550AParallel Host Interface 16C450/16C550A UART Figure 11. UART Emulation in Intelsdb.VxDUART Receiver Flow Diagram UART Transmitter Flow DiagramBIT NUMBER REGISTERADDRESS NAME9.2.2Modem Status Register MSR 9.2.1Scratch Register SCRFigure 14. Scratch Register SCR Figure 15. Modem Status Register MSRFigure 16. Line Status Register LSR 9.2.3Line Status Register LSR9.2.5Line Control Register LCR 9.2.4Modem Control Register MCRFigure 17. Modem Control Register MCR Figure 18. Line Control Register LCR9.2.6FIFO Control Register FCR RegisterFigure 19. FIFO Control Register FCR 9.2.7Interrupt Identity Register IIR Figure 20. Interrupt Identity Register IIRTable 28. Interrupt Control Functions Figure 21. Interrupt Enable Register IER 9.2.8Interrupt Enable Register IER9.2.9Transmitter Holding Register THR Figure 22. Transmitter Holding Register THR9.2.11Divisor Latch Registers DLM and DLL 9.2.10Receiver Buffer Register RBRFigure 23. Receiver Buffer Register RBR Figure 24. Divisor Latch Registers DLM and DLL9.316C550A UART FIFO Operation 9.3.1FIFO Interrupt Mode Operation9.3.2FIFO Polled Mode Operation Intel Confidential Parallel Host Interface 16C450/16C550A UART536EX Chipset Developer’s Manual