Intel 536EX manual 9.2.10Receiver Buffer Register RBR, 9.2.11Divisor Latch Registers DLM and DLL

Parallel Host Interface 16C450/16C550A UART

9.2.10Receiver Buffer Register (RBR)

Figure 23. Receiver Buffer Register (RBR)

Register 0

(DLAB = 0)

RBR

The RBR (Receiver Buffer register) is a read-only register used for receiving data and AT command responses from the modem.

9.2.11Divisor Latch Registers (DLM and DLL)

Figure 24. Divisor Latch Registers (DLM and DLL)

Register 1

(DLAB = 1)

Register 0

(DLAB = 1)

DLM (MS)

DLL (LS)

The LS divisor latch (least-significant byte) and MS divisor latch (most-significant byte) are two read/write registers used to set the modem data rate. The data rate is selected by loading each divisor latch with the appropriate hex value. The programmable data rates are provided in the following table. For example, to use a data rate of 2400 bps, load a $00h into the DLM and a $30h into the DLL.

Table 29. Programmable Data Rates

Data Rate	Divisor Number	Divisor Latch (Hex)
	(Decimal)	MS	LS
300	384	01	80
1200	96	00	60
2400	48	00	30
4800	24	00	18
7200	16	00	10
9600	12	00	0C
19200	6	00	06
38400	3	00	03
57600	2	00	02

536EX Chipset Developer’s Manual 101

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