Intel IQ80960RM, RN manual Ctools Software Development Toolset, SPI610 Jtag Emulation System

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Introduction

1.4CTOOLS Software Development Toolset

Intel’s i960 processor software development toolset, CTOOLS, features advanced

C/C++ - language compilers for the i960 processor family. CTOOLS development toolset is available for Windows* 95/NT-based systems and a variety of UNIX workstation hosts. These products provide execution profiling and instruction scheduling optimizations and include an assembler, a linker, and utilities designed for embedded processor software development.

1.4.1CTOOLS and the MON960 Debug Monitor

In place of IxWorks, the IQ80960RM/RN platform can be equipped with Intel’s MON960, an on-board software monitor that allows you to execute and debug programs written for i960 processors in a non-I2O environment. The monitor provides program download, breakpoint, single step, memory display, and other useful functions for running and debugging a program.

The IQ80960RM/RN platform works with the source-level debuggers provided with CTOOLS, including GDB960 (command line version) and GDB960V (GUI version).

1.4.1.1MON960 Host Communications

MON960 allows you to communicate and download programs developed for the IQ80960RM/RN platform across a host system’s serial port or PCI interface. The IQ80960RM/RN platform supports two methods of communication: terminal emulation and Host Debugger Interface (HDI).

1.4.1.2Terminal Emulation Method

Terminal emulation software on your host system can communicate to MON960 on the IQ80960RM/RN platform via an RS-232 serial port. The IQ80960RM/RN platform supports port speeds from 300 to 115,200 bps. Serial downloads to MON960 require that the terminal emulation software support the XMODEM protocol.

Configure the serial port on the host system for 300-115,200 baud, 8 bits, one stop bit, no parity with XON/XOFF flow control.

1.4.1.3Host Debugger Interface (HDI) Method

You may use a source-level debugger, such as Intel’s GDB960 and GDB960V to establish serial or PCI communications with the IQ80960RM/RN platform. The MON960 Host Debugger Interface (HDI) provides a defined messaging layer between MON960 and the debugger. For more information on this interface, see the MON960 Debug Monitor User’s Manual (484290).

HDI connection requests cannot be detected by MON960 if the user has already initiated a connection using a terminal emulator. In this case, the IQ80960RM/RN platform must be reset before the debugger can connect to MON960.

1.5SPI610 JTAG Emulation System

The SPI610 JTAG Emulation System from Spectrum Digital, Inc. is included in the IQ80960RM/RN development kit. It furnishes the default host development environment-to- evaluation board communication link based on the i960 RM/RN I/O processor JTAG interface.

IQ80960RM/RN Evaluation Board Manual

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Contents Board Manual IQ80960RM/RN Evaluation PlatformIQ80960RM/RN Evaluation Platform Board Manual Contents 2.1 Tables FiguresPage Introduction IQ80960RM/IQ80960RN Platform Functional Block DiagramIQ80960RN Platform Physical Diagram Software Development Tools I960 RM/RN I/O Processor and IQ80960RM/RN FeaturesTornado Test and Debug Tools Tornado* for I20* Software Development ToolsetIxWorks* Real-Time Operating System Tornado Build ToolsCtools and the MON960 Debug Monitor Ctools Software Development ToolsetSPI610 Jtag Emulation System About This Manual Brief description of the contents of this manual followsTechnical Support Notational-ConventionsCountry Literature Customer Support Number Intel Customer Electronic Mail SupportIntel Customer Support Contacts Product Document Name Company/ Order # Related InformationDocument Information Cyclone ContactsPage Getting Started Pre-Installation ConsiderationsSoftware Installation Installing Software Development ToolsVerify IQ80960RM/RN Platform is Functional Hardware InstallationBattery Backup Installing the IQ80960RM/RN Platforms in the Host SystemCreating and Downloading Executable Files Sample Download and Execution Using GDB960Page Hardware Reference Power RequirementsIQ80960RN Platform Power Requirements IQ80960RM Platform Power RequirementsTable Clocks Sdram PerformanceSdram Performance Flash ROM Programming Sdram ConfigurationsFlash ROM Upgrading SdramUart Register Addresses Secondary PCI Bus Expansion ConnectorsPCI Slots Power Availability Console Serial PortSecondary PCI Bus Interrupt and Idsel Routing Battery BackupLoss of Fan Detect Interrupt and Idsel RoutingJ12 J10 Logic Analyzer HeadersLogic Analyzer Header Definitions Pin Switch S1 SettingsJtag Header Jtag Header PinoutLEDs Tests User LEDsUser LEDs During Initialization 10. Start-up LEDs MON96011. IQ80960RM/RN Connectors and LEDs Page I960 RM/RN I/O Processor Overview I960 RM/RN I/O Processor Block DiagramIQ80960RM/RN Platform Memory Map CPU Memory MapLocal Interrupts I960 RN/RM I/O Processor I960 RM/RN I/O Processor Interrupt Controller ConnectionsSecondary PCI Interface CPU Counter/TimersPrimary PCI Interface Application Accelerator Unit DMA ChannelsApplication Accelerator Unit Performance Monitor UnitPage 1 MON960 Initialization MON960 Support for IQ80960RM/RNMON960 Components Sdram Initialization 2 80960JT Core InitializationMemory Controller Initialization Initialization Primary PCI Interface I960 Core SW1-1 SW1-2 Primary PCI Interface InitializationPrimary ATU Initialization Initialization ModesSecondary ATU Initialization PCI-to-PCI Bridge InitializationSecondary PCI Initialization MON960 KernelMON960 Extensions SysPCIBIOSPresent PCI Bios RoutinesSysFindPCIDevice SysGenerateSpecialCycle SysReadConfigWord SysWriteConfigByte SysWriteConfigDword Secondary PCI Diagnostics Diagnostics / Example CodeAdditional MON960 Commands Board Level DiagnosticsQty Location Part Description Manufacturer Bill of MaterialsTable A-1. IQ80960RN Bill of Materials Sheet 1 Table A-1. IQ80960RN Bill of Materials Sheet 2 Location Part Description Manufacturer Table A-1. IQ80960RN Bill of Materials Sheet 3CR8 Table A-1. IQ80960RN Bill of Materials Sheet 4Table A-2. IQ80960RM Bill of Materials Sheet 1 Table A-2. IQ80960RM Bill of Materials Sheet 2 Table A-2. IQ80960RM Bill of Materials Sheet 3 Table A-2. IQ80960RM Bill of Materials Sheet 4 Part Description Manufacturer Table A-2. IQ80960RM Bill of Materials Sheet 5Bill of Materials Schematic Title SchematicsTable B-1. IQ80960RN Schematics List IC Decoupling Connpcia REV Memory Controller Dclkin Dramclk LA Spares Dramclkla Mictor SDRAM-DIMM168P RST# Jtag Header Spci Conn Inta A6 RNC4R8P SAD48 SPAR64 SREQ4# Spares Table B-2. IQ80960RM Schematics List 80960RM REV Primary PCI Interface RCE1# RWE# Outb RAD16 TXD SBA0 DQ0 SCB0 SCE1# DQ2 SAD2 AD3S CONNPCI32 Trst A1 SINTD# B7 Intb Intc A7 SINTA# PALLV16V8-10JC Page Chip PALLV16V8Z-20JI PLD CodePage Recycling the Battery

RN, IQ80960RM specifications

The Intel IQ80960RM and RN are part of the Intel i960 family of microprocessors, which were specifically designed for embedded applications in real-time computing environments. Introduced in the early 1990s, these processors were aimed at providing high-performance processing capabilities in industrial, telecommunications, and military systems.

One of the key features of the IQ80960RM and RN is their ability to support a 32-bit architecture, delivering a significant performance advantage over 16-bit and earlier processors. This architecture enables the execution of complex algorithms and the management of large amounts of data, making these microprocessors suitable for demanding applications.

The i960 family is built around a superscalar architecture, allowing multiple instructions to be completed in a single clock cycle. This is achieved through advanced instruction pipelining, which significantly boosts throughput and overall computational speed. The IQ80960RM and RN also included features like branch prediction and out-of-order execution, enhancing efficiency and reducing latency in real-time applications.

Memory management capabilities are another strong point of the IQ80960RM and RN. They support both virtual and physical memory addressing, enabling sophisticated memory management strategies. Their integrated memory management unit (MMU) allows for easier and more effective memory allocation, critical for real-time operating systems that require precise timing and resource management.

Furthermore, these processors are designed with an extensive instruction set architecture (ISA), which supports a wide range of operations, including digital signal processing (DSP) tasks. This versatility allows them to be utilized in various applications, from automotive systems to robotics, where reliable performance is paramount.

The thermal performance and power efficiency of the IQ80960RM and RN has also been a notable characteristic. With operational capabilities across various temperature ranges, these chips are well-suited for harsh environments often found in industrial settings.

In terms of connectivity, the IQ80960 series supports multiple I/O interfaces and communication protocols, ensuring that they can integrate seamlessly with other components and systems. This flexibility enhances their usability in networked applications, particularly in embedded systems.

Overall, the Intel IQ80960RM and RN processors represent a significant step forward in embedded processor technology, characterized by their robust performance, advanced features, and ability to meet the stringent demands of real-time applications across various industries.