Intel 8051 manual SINGLE-COMPONENT 8-BIT Microcomputer

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8051 Architectural Specification and Functional Description

8031/8051/8751

SINGLE-COMPONENT 8-BIT MICROCOMPUTER

803t - Control Oriented CPU With RAM and I/O

8051 - An 8031 With Factory Mask- Programmable ROM

8751 - An 8031 With User Programmable/Erasable EPROM

4K x 8 ROM/EPROM

128 x 8 RAM

Four 8-Bit Ports, 32 I/O Lines

Two 16-Bit Timer/Event Counters

High-Performance Full-Duplex Serial Channel

Boolean Processor

Compatible with MCS-80™/MCS-85TM Peripherals

External Memory Expandable to 128K

MCS-48™ Architecture Enhanced with:

Non-Paged Jumps

Direct Addressing

Four 8-Register Banks

Stack Depth Up to 128-Bytes

Multiply, Divide, Subtract, Compare

Most Instructions Execute in 111S

411s Multiply and Divide

The Intel® 8031/8051/8751 is a stand-alone, high-performance single-chip computer fabricated with Intel's highly-reliable +5 Volt, depletion-load, N-Channel, silicon-gate HMOS technology and packaged in a 40-pin DIP. It provides the hardware features, architectural enhancements and new instructions that are necessary to make it a powerful and cost effective controller for applications requiring up to 64K bytes of program memory and / or up to 64K bytes of data storage.

The 8051/8751 contains a non-volatile 4K x 8 read only program memory; a volatile 128 x 8 read/write data memory; 32 I/O lines; two 16-bit timer/counters; a five-source, two-priority-Ievel, nested interrupt structure; a serial I/O port for either multi-processor communications, I/O expansion, or full duplex UART; and on-chip oscillator and clock circuits. The 8031 is identical, except that it lacks the program memory. For systems that require extra capability, the 8051 can be expanded using standard TTL compatible memories and the byte oriented MCS-80 and MCS-85 peripherals.

The 8051 microcomputer, like its 8048 predecessor, is efficient both as a controller and as an arithmetic processor. The 8051 has extensive facilities for binary and BCD arithmetic and excels in bit-handling capabilities. Efficient use of program memory results from an instruction set consisting of 44% one-byte, 41% two-byte, and 15% three-byte instructions. With

a12 MHz crystal, 58% of the instructions execute in Ills, 40% in 2f1s and mUltiply and divide require only 411S. Among the many instructions added to the standard 8048 instruction set are multiply, divide, subtract and compare.

AST/VPD

 

FREQUENCY

COUNTERS

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AND 110 PINS

 

 

 

 

 

Figure 1. Pin

Figure 2.

Logic Symbol

 

 

 

Figure 3.

Block Diagram

 

 

 

 

Configuration

 

 

 

 

 

 

 

 

 

 

 

 

Intel Corporation Assumes No Responsibility for the Use of Any Circuitry Other Than Circuitry Embodied in an Intel Product. No Other Circuit Patent licenses Are Implied.

© INTEL CORPORATION. 1980.

AFN-01488A-02

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Contents Architectural Specification ICE SINGLE-COMPONENT 8-BIT Microcomputer Architectural Specification and Functional DescriptionContents Architectural Overview Abstract Intelscomplete Line of SINGLE-CHIP MicrocomputersEnhancing the 8048 ARCHITEC- Ture for the 80s MACRO-VIEW of the 8051 Archi Tecture On-Chip Peripheral Functions Architectural Speciffcation ancrFunctionaJ DescrlpfionRequest Microcomputer Expansion Components Ii~O,.R~~~~~~ ~ J -r-r ~r~ r =fJ ~~~--------~--~--~---I~ Architectural Specification and Functional DescriptionInstruction Decoder Program CounterInternal Data Memory · t1 Boolean Processor Arithmetic SectionProgramControl Section Oscillator and Timing CircuitryParallel I/O Ports Operand Addressing~~143 136 ~ Data Transfer Operations Data Manipulation18. External Data Memory Move Operations Logic Operations21. Internal Data Memory Logic Operations Arithmetic OperationsREGplSCTER 14e--I-~--I~IMMEDArE,.j Organization of the Instruction Set Instruction SeT What the Instruction Set IsData Transfer Control Transfer 33.A Operand Addressing Modes Operand Addressing Modes & Associated OperationsMOV Interrupt SystemTFI TCON.7 External Interrupts Ports and I/O PinsAccessing External Memory TsU~l ArcnneCtural specification and Functional Description Accessing External Memory-Opera- tion of PortsAccessing External Memory-Bus Cycle Timing CDV TIMER/COUNTER Timer/Counter Mode SelectionConfiguring the Timer/Counter Input Serial Channel 47. Uart Interfacing Technique SCON.O Operating ModesUart Error Conditions Serial FrameTransmission Rate Generation Power Down Standby Operation of Internal RAM Processor Reset and InitializationEprom Programming Vee RSTNpD 8051 Instruction SET Summary Instructions That Affect Flag SettingsAll mnemonics copyrighted@ Intel Corporation