Quatech RS-422 user manual DSCLP-200/300 Revision December

Page 40

DSCLP-200/300

User's Manual

Revision 1.10

December 1999

P/N: 940-0182-110

Image 40
Contents DSCLP-200/300 Page Serial Number Declaration of Conformity Table of Contents General Information Hardware Configuration RS-422 or RS-485 Signal Line TerminationSignal Connections Full-duplex/Half-duplex Operation2 AUX0SEL1,0, AUX1SEL1,0 J12,11,19,18 1 CTS0SEL, CTS1SEL J10,17RCLK0SEL, RCLK1SEL J13 Enable Scratchpad Register SPAD, J2 4 TGL0SEL1,0, TGL1SEL1,0 J15,14,22,21RXEN0SEL, RXEN1SEL J16 Clock Rate and Optional RegistersEnable scratchpad registers Force High-Speed Uart Clock X2 or X4, J4-J5X4 mode Hardware Installation Jumper/connector locationsAddress Map and Special Registers Base Address and Interrupt Level IRQEnabling the Special Registers Interrupt Status RegisterQuatech Modem Control Register Quatech Modem Control RegisterOptions Register Enhanced Serial Adapter IdentificationClock Rate Multiplier RR1 RR0Windows Configurations Windows MillenniumWindows Windows Windows Using the New Hardware Found Wizard Viewing Resources with Device Manager Page Page Page Other Operating Systems Windows NTOS/2 DOS and other operating systemsQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display External Connections Jumper/Channel correspondenceRTS/CTS Handshake RclkXclk AUXIN/AUXOUT LoopbackHalf-Duplex/Full-Duplex Selection Half- or full-duplex selection Termination Resistors RS-422/485 Line termination resistance valuesDSCLP-200/300 connector definitions RS-422/485 Peripheral ConnectionPCI Resource Map INTA#Specifications With 64-byte FIFOs optionalTroubleshooting Computer will not boot upDSCLP-200/300 Revision December