Quatech RS-422 user manual Clock Rate Multiplier, RR1 RR0

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4.5.2 Clock Rate Multiplier

A standard serial port operates at a clock speed of 1.8432 MHz. In order to achieve higher data rates, Quatech Enhanced Serial Adapters can operate at two times or four times this standard clock speed. This is controlled by the clock rate multiplier bits in the Options Register.

Software can determine the UART clock frequency by reading the clock rate multiplier bits RR1 and RR0 in the Options Register as shown in Figure 12. RR1 and RR0 can be set by writing to the Options Register if the X2 and X4 jumpers (J4-J5) are all removed. If one of these jumpers is applied, the RR1 and RR0 bits are forced to the appropriate value. Reading the Options Register will always return the clock rate multiplier at which the board is operating.

RR1

RR0

Clock Rate

UART Clock

Maximum Data

Multiplier

Frequency

Rate

 

 

0

0

X1

1.8432 MHz

115.2 kbaud

(default)

 

 

 

 

0

1

X2

3.6864 MHz

230.4 kbaud

1

0

X4

7.3728 MHz

460.8 kbaud

Figure 12 --- Rate Register bit definition

At powerup and reset, the Options Register is initialized to 0. The DSCLP-200/300 will thus powerup in the x1 mode with software control of the clock rate multiplier enabled as long as the X2 and X4 jumpers are not installed.

Software can control high baud rates through a combination of changing the clock rate multiplier and the UART baud rate divisor. For example, a baud rate of

230.4kbps could be achieved by setting the clock rate multiplier to X2 mode (or by applying the X2 jumper) and setting a software application for 115.2 kbps.

The X4 clock multiplier settings require the presence of 16750 UARTs. Operation at X4 cannot

be guaranteed with 16550 UARTs.

DSCLP-200/300 User's Manual

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Contents DSCLP-200/300 Page Serial Number Declaration of Conformity Table of Contents General Information Hardware Configuration RS-422 or RS-485 Signal Line TerminationSignal Connections Full-duplex/Half-duplex Operation1 CTS0SEL, CTS1SEL J10,17 2 AUX0SEL1,0, AUX1SEL1,0 J12,11,19,18RCLK0SEL, RCLK1SEL J13 RXEN0SEL, RXEN1SEL J16 Enable Scratchpad Register SPAD, J24 TGL0SEL1,0, TGL1SEL1,0 J15,14,22,21 Clock Rate and Optional RegistersEnable scratchpad registers Force High-Speed Uart Clock X2 or X4, J4-J5X4 mode Hardware Installation Jumper/connector locationsAddress Map and Special Registers Base Address and Interrupt Level IRQEnabling the Special Registers Interrupt Status RegisterQuatech Modem Control Register Quatech Modem Control RegisterOptions Register Enhanced Serial Adapter IdentificationClock Rate Multiplier RR1 RR0Windows Configurations Windows MillenniumWindows Windows Windows Using the New Hardware Found Wizard Viewing Resources with Device Manager Page Page Page OS/2 Other Operating SystemsWindows NT DOS and other operating systemsQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display External Connections Jumper/Channel correspondenceRTS/CTS Handshake RclkXclk AUXIN/AUXOUT LoopbackHalf-Duplex/Full-Duplex Selection Half- or full-duplex selection Termination Resistors RS-422/485 Line termination resistance valuesDSCLP-200/300 connector definitions RS-422/485 Peripheral ConnectionPCI Resource Map INTA#Specifications With 64-byte FIFOs optionalTroubleshooting Computer will not boot upDSCLP-200/300 Revision December