Quatech RS-422 user manual General Information

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1 General Information

The Quatech, Inc. DSCLP-200/300(two-port) and SSCLP-200/300 (one-port) provides upto provides two RS-422 or RS-485 asynchronous serial communication interfaces for IBM-compatible personal computer systems using the PCI expansion bus. The DSCLP-200/300 uses Quatech's new Enhanced Serial Adapter design. Legacy serial port data rates are limited to a maximum of 115,200 bits per second. Quatech Enhanced Serial Adapters can achieve data rates as high as 460,800 bits per second. This discussion relates to DSCLP-200/300. A

SSCLP-200/300 is just one port in the discussion.

As a PCI device, the DSCLP-200/300 requires no hardware configuration. The card is automatically configured by the computer's BIOS or operating system. The two serial ports share a single interrupt line and are addressed in a contiguous block of 16 bytes. A special interrupt status register is provided to help software to manage the shared interrupt.

The DSCLP-200/300's serial ports are implemented using 16550 Universal Asynchronous Receiver/Transmitters (UARTs). These UARTs contain hardware buffers (FIFOs) which reduce processing overhead and allow higher data rates to be achieved. The 16550 contains a 16-byte FIFO and can transmit and receive data at a rate of up to 230,400 bits per second.

The DSCLP-200/300 is supported under several popular operating systems and environments. Contact the sales department for details on current software offerings. Most device drivers are available for download from the Quatech world wide web site at http://www.quatech.com.

DSCLP-200/300 User's Manual

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Contents DSCLP-200/300 Page Serial Number Declaration of Conformity Table of Contents General Information Hardware Configuration RS-422 or RS-485 Signal Line TerminationSignal Connections Full-duplex/Half-duplex Operation1 CTS0SEL, CTS1SEL J10,17 2 AUX0SEL1,0, AUX1SEL1,0 J12,11,19,18RCLK0SEL, RCLK1SEL J13 RXEN0SEL, RXEN1SEL J16 Enable Scratchpad Register SPAD, J24 TGL0SEL1,0, TGL1SEL1,0 J15,14,22,21 Clock Rate and Optional RegistersEnable scratchpad registers Force High-Speed Uart Clock X2 or X4, J4-J5X4 mode Hardware Installation Jumper/connector locationsAddress Map and Special Registers Base Address and Interrupt Level IRQEnabling the Special Registers Interrupt Status RegisterQuatech Modem Control Register Quatech Modem Control RegisterOptions Register Enhanced Serial Adapter IdentificationClock Rate Multiplier RR1 RR0Windows Configurations Windows MillenniumWindows Windows Windows Using the New Hardware Found Wizard Viewing Resources with Device Manager Page Page Page OS/2 Other Operating SystemsWindows NT DOS and other operating systemsQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display External Connections Jumper/Channel correspondenceRTS/CTS Handshake RclkXclk AUXIN/AUXOUT LoopbackHalf-Duplex/Full-Duplex Selection Half- or full-duplex selection Termination Resistors RS-422/485 Line termination resistance valuesDSCLP-200/300 connector definitions RS-422/485 Peripheral ConnectionPCI Resource Map INTA#Specifications With 64-byte FIFOs optionalTroubleshooting Computer will not boot upDSCLP-200/300 Revision December