Quatech RS-422 user manual Options Register, Enhanced Serial Adapter Identification

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4.5 Options Register

The Options Register allows software to identify the DSCLP-200/300 as a Quatech Enhanced Serial Adapter. It also allows software to set the UART clock rate multiplier. Figure 10 shows the structure of the Options Register.

The powerup default of the Options Register is all bits zero.

Bit

Name

Description

 

 

 

7 (MSB)

ID1

ID bit 1

 

 

 

6

ID0

ID bit 0

 

 

 

5

-

(reserved, 0)

 

 

 

4

-

(reserved, 0)

 

 

 

3

-

(reserved, 0)

 

 

 

2

-

(reserved, 0)

 

 

 

1

RR1

Clock rate multiplier bit 1

 

 

 

0

RR0

Clock rate multiplier bit 0

 

 

 

Figure 10--- Options Register bit definitions

4.5.1 Enhanced Serial Adapter Identification

The ID bits are used to identify the DSCLP-200/300 as a Quatech Enhanced Serial Adapter. Logic operations are performed such that the values read back from these bits will not necessarily be the values that were written to them. Bit ID1 will return the logical-AND of the values written to ID[1:0], while bit ID0 will return their exclusive-OR.

Software can thus identify a Quatech Enhanced Serial Adapter by writing the ID bits with the patterns shown in the "write" column of Figure 11, then reading the bits and comparing the result with the patterns in the "read" column. Matching read patterns verify the presence of the Options Register.

Write

Read

ID1

ID0

ID1

ID0

0

0

0

0

0

1

0

1

1

0

0

1

1

1

1

0

Figure 11 --- ID bit write/read table

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DSCLP/SSCLP-200/300 User's Manual

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Contents DSCLP-200/300 Page Serial Number Declaration of Conformity Table of Contents General Information RS-422 or RS-485 Signal Line Termination Hardware ConfigurationFull-duplex/Half-duplex Operation Signal ConnectionsRCLK0SEL, RCLK1SEL J13 1 CTS0SEL, CTS1SEL J10,172 AUX0SEL1,0, AUX1SEL1,0 J12,11,19,18 4 TGL0SEL1,0, TGL1SEL1,0 J15,14,22,21 Enable Scratchpad Register SPAD, J2RXEN0SEL, RXEN1SEL J16 Clock Rate and Optional RegistersForce High-Speed Uart Clock X2 or X4, J4-J5 Enable scratchpad registersX4 mode Jumper/connector locations Hardware InstallationBase Address and Interrupt Level IRQ Address Map and Special RegistersInterrupt Status Register Enabling the Special RegistersQuatech Modem Control Register Quatech Modem Control RegisterEnhanced Serial Adapter Identification Options RegisterRR1 RR0 Clock Rate MultiplierWindows Millennium Windows ConfigurationsWindows Windows Windows Using the New Hardware Found Wizard Viewing Resources with Device Manager Page Page Page Windows NT Other Operating SystemsOS/2 DOS and other operating systemsQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display Jumper/Channel correspondence External ConnectionsRclk RTS/CTS HandshakeAUXIN/AUXOUT Loopback XclkHalf-Duplex/Full-Duplex Selection Half- or full-duplex selection RS-422/485 Line termination resistance values Termination ResistorsRS-422/485 Peripheral Connection DSCLP-200/300 connector definitionsINTA# PCI Resource MapWith 64-byte FIFOs optional SpecificationsComputer will not boot up TroubleshootingDSCLP-200/300 Revision December