Texas Instruments PCI445X manual 12.9 SMI, Socket Power Lock, 12.11VCC Protection

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System Features Selection

CCLK can be slowed down rather than stopped by CCLKRUN. If CCLKRUN is set, the CLKCTRLEN (CardBus socket 20h, bit 16) and CLKCTR (CardBus socket 20h, bit 0) bits are both set to 1. The clock is slowed down to 1/16. In this mode the PCI clock is not allowed to stop.

1.1.12.9 SMI

A PC card power change event can be reported to the system as SMI (IRQ2 or CSC). It can be controlled with the SMIROUTE, SMISTATUS, and SMIENB bits (system control register, PCI offset 80h, bits 26, 25, and 24, respectively).

1.1.12.10 Socket Power Lock

Socket power can be protected from software control in the D3hot state. It can be done with the socket power lock bit (device control register, PCI offset 92h, bit 7).

1.1.12.11VCC Protection

The VCCPROT bit (system control register, PCI offset 80h, bit 21) controls VCC protection for 16-bit cards. This feature protects applying the wrong (higher) VCC to the 16-bit card. If a 3.3-V-only card is inserted, then it protects against applying 5 V to the card. Default is 0 (enabled).

1.1.12.12 ZV Port Control and Auto Detect Function

Internal zoomed video buffers can be controlled with the ZV autodetect function. It can be turned on by setting the zoomed video autodetect bit (multimedia control register, PCI offset 84h, bit 5) to 1. Autodetect priority encoding bits (multimedia control register, PCI offset 84h, bits 4±2) can control the priority scheme.

PCI445X Device

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Contents Implementation Guide Important Notice About This Manual Read This FirstCsr ±a /user/ti/simuboard/utilities Related Documentation From Texas Instruments Page Contents Viii Figures Tables Topic PCI445X Device±1. Typical System Architecture System Features Selection Optional PCI Signals Socket Power SwitchesPCI and ISA Style Interrupt Distributed DMA DdmaMFUNC7±MFUNC0 Terminal Assignments Socket Activity LEDsMiscellaneous Functions Description Serialized Interrupt ControlPower Savings Mode CardBus Reserved Terminal SignalingAsynchronous CSC Interrupt Generation Memory Burst R/W Operation Control12.9 SMI Socket Power Lock12.11VCC Protection ZV Port Control and Auto Detect FunctionClamping Rails System ImplementationPCI Bus Interface PERR, SERR, and LockINTA, INTB, and Intc Prst PCI reset and Grst Global resetSocket power supply 4 2-Wire I2C Interface for EepromPC Card Interface Damping resistor on Cclk terminalEeprom ±1. Registers and Bits Loadable Through Serial EepromSample PCI445X Eeprom Data File System Implementation Zoomed Video ZV Interface 1 P2C Interface for TPS22X6 Power SwitchMiscellaneous Signals Interrupt Signaling Interface±2. PC Card Interface Pullup Resistor List² ³ Requirement of Pullup/Pulldown Resistors±4. Miscellaneous Terminals Pullup Resistor List ±3. PCI Bus Interface Pullup Resistor ListLPS ±5. Required Pullup/Pulldown ResistorsPCI Standard Registers Initialization Bios ConsiderationsInitialization PCI TI Proprietary Registers Initialization System Sleeping State ConsiderationDocking System Consideration Register save/restoreImportant Information Topic Global Reset Only Bits, PME Context BitsTable A±1.Global Reset Only Cleared Bits Global Reset Only Bits/PME Context BitsTable A±2.PME Context Bits Page PME and RI Behavior PME and RI Behavior Table B±1.CardBus Ctschg and Wake-Up Signals Truth TablePCI445X Buffer Types PCI445X Buffer Types Signal Name Terminal TypeACVS2 BCAD22 GND PHYDATA6 ZVUV4 TSO Buffer Type Description Table C±2. Buffer Type Abbreviations