Texas Instruments PCI445X manual ±1. Registers and Bits Loadable Through Serial Eeprom

Page 21

 

 

 

System Implementation

 

Table 1±1. Registers and Bits Loadable Through Serial EEPROM

 

 

 

 

 

 

Register Offset

Register

Bits Loaded From

 

 

 

EEPROM

 

 

 

 

 

 

The following are configuration registers for the OHCI function (function 2)

 

 

 

 

PCI register (2Ch)

PCI subsystem ID

15±0

 

 

 

 

 

PCI register (2Dh)

PCI vendor ID

15±0

 

 

 

 

 

PCI register (3Eh)

PCI maximum latency, minimum grant

11±8, 3±0

 

 

 

 

 

PCI register (F0h)

PCI miscellaneous configuration

15, 13, 10, 3±0

 

 

 

 

 

PCI register (F4h)

Link enhancements control

7, 2, 1

 

 

 

 

 

OHCI register (24h)

1394 global unique ID Hi

31±0

 

 

 

 

 

OHCI register (28h)

1394 global unique ID Lo

31±0

 

 

 

 

 

 

 

The following are configuration registers for PC Card functions (functions 0 and 1)

 

 

 

 

PCI register (40h)

Subsystem vendor ID

15±0

 

 

 

 

 

PCI register (42h)

Subsystem ID

15±0

 

 

 

 

 

PCI register (80h)

System control

31±24, 22±14, 6±3, 1, 0

 

 

 

 

 

PCI register (86h)

General control

3±0

 

 

 

 

 

PCI register (89h)

General-purpose event enable

7, 6, 3±0

 

 

 

 

 

PCI register (8Bh)

General-purpose output

3±0

 

 

 

 

 

PCI register (8Ch)

Multifunction routing

30±28, 26±24, 22±20,

 

 

 

 

18±16, 14±12, 10±8,

 

 

 

 

6±4, 2±0

 

 

 

 

 

PCI register (91h)

Card control

7, 6, 2±0

 

 

 

 

 

PCI register (92h)

Device control

7, 6, 2±0

 

 

 

 

 

PCI register (93h)

Diagnostic

7, 5, 0

 

 

 

 

 

PCI register (A2h)

Power management capabilities

15

 

 

 

 

 

PCI register

ExCA ID and revision

7±0

 

 

 

 

 

 

PCI445X Device

1-11

Image 21
Contents Implementation Guide Important Notice About This Manual Read This FirstCsr ±a /user/ti/simuboard/utilities Related Documentation From Texas Instruments Page Contents Viii Figures Tables Topic PCI445X Device±1. Typical System Architecture System Features Selection Optional PCI Signals Socket Power SwitchesPCI and ISA Style Interrupt Distributed DMA DdmaMFUNC7±MFUNC0 Terminal Assignments Socket Activity LEDsMiscellaneous Functions Description Serialized Interrupt ControlPower Savings Mode CardBus Reserved Terminal SignalingAsynchronous CSC Interrupt Generation Memory Burst R/W Operation Control12.9 SMI Socket Power Lock12.11VCC Protection ZV Port Control and Auto Detect FunctionClamping Rails System ImplementationPCI Bus Interface PERR, SERR, and LockINTA, INTB, and Intc Prst PCI reset and Grst Global resetSocket power supply 4 2-Wire I2C Interface for EepromPC Card Interface Damping resistor on Cclk terminalEeprom ±1. Registers and Bits Loadable Through Serial EepromSample PCI445X Eeprom Data File System Implementation Zoomed Video ZV Interface 1 P2C Interface for TPS22X6 Power SwitchMiscellaneous Signals Interrupt Signaling Interface±2. PC Card Interface Pullup Resistor List² ³ Requirement of Pullup/Pulldown Resistors±4. Miscellaneous Terminals Pullup Resistor List ±3. PCI Bus Interface Pullup Resistor ListLPS ±5. Required Pullup/Pulldown ResistorsBios Considerations InitializationPCI Standard Registers Initialization PCI TI Proprietary Registers Initialization System Sleeping State ConsiderationDocking System Consideration Register save/restoreImportant Information Topic Global Reset Only Bits, PME Context BitsTable A±1.Global Reset Only Cleared Bits Global Reset Only Bits/PME Context BitsTable A±2.PME Context Bits Page PME and RI Behavior PME and RI Behavior Table B±1.CardBus Ctschg and Wake-Up Signals Truth TablePCI445X Buffer Types PCI445X Buffer Types Signal Name Terminal TypeACVS2 BCAD22 GND PHYDATA6 ZVUV4 TSO Buffer Type Description Table C±2. Buffer Type Abbreviations