Texas Instruments PCI445X manual Prst PCI reset and Grst Global reset, INTA, INTB, and Intc

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System Implementation

IDSEL, there is no alternative. If another AD line is to be used for IDSEL, then the system designer must leave the pullup off LATCH and use MFUNC7 to route IDSEL. Also, if AD23 is used, then the resistive coupling should not be used.

Refer to the Implementation Note: System Generation of IDSEL in the PCI Local Bus Specification, Revision 2.2 (section 3.2.2.3.5). PCI Local Bus Specification, Revision 2.2 (section 4.2.6, footnote 31) recommends resistive coupling. A 100-Ωresistor is recommended.

￿PRST (PCI reset) and G_RST (Global reset)

G_RST initializes all of the registers and state-machines of the PCI445X device, and PRST does not. G_RST should be asserted during power-on and rebooting. It puts the PCI445X device into the initialized state. PRST does not initialize global-reset-only bits and, if PME is enabled, PME context bits. Refer to Table A±1, Global Reset Only Cleared Bits, and Table A±2, PME Context Bits. PRST is connected to PCI RESET; G_RST requires a special signal in the motherboard. It will come from the chipset.

If the system does not support wake-up from D3cold, then PRST and G_RST can be tied together. Note that G_RST and PRST are clamped to VCCP.

￿INTA, INTB, and INTC

When using one of the parallel PCI interrupt modes, INTA, INTB, and INTC should be connected to the PCI interrupt lines. If the INTRTIE bit (system control register, PCI offset 80h, bit 29) is set, then both CardBus functions (functions 0 and 1) will signal and report INTA, and only INTA and INTC will need to be routed. If the TIEALL bit (system control register, PCI offset 80h, bit 28) is set, then all functions (0, 1, and 2) will report INTA and INTA will be the only interrupt required.

￿CLKRUN

This signal is optional. However, if saving power is a concern, this signal should be implemented. Refer to the PCI Mobile Design Guide Revision 1.1 (Section 2).

￿PME

This signal is required for the ACPI systems. In a notebook PC, this signal is usually connected to the south bridge (ex., PIIX4) or embedded controller (EC). The PME terminal uses an open-drain type buffer.

Note: Pullup Resistor Requirements

A pullup resistor is required for each of the following terminals: IRDY, TRDY, FRAME, STOP, DEVSEL, PERR, SERR, LOCK, PRST, G_RST, INTA, INTB, INTC, CLKRUN, and PME.

PCI445X Device

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Contents Implementation Guide Important Notice About This Manual Read This FirstCsr ±a /user/ti/simuboard/utilities Related Documentation From Texas Instruments Page Contents Viii Figures Tables Topic PCI445X Device±1. Typical System Architecture System Features Selection Distributed DMA Ddma Socket Power SwitchesOptional PCI Signals PCI and ISA Style InterruptSerialized Interrupt Control Socket Activity LEDsMFUNC7±MFUNC0 Terminal Assignments Miscellaneous Functions DescriptionMemory Burst R/W Operation Control CardBus Reserved Terminal SignalingPower Savings Mode Asynchronous CSC Interrupt GenerationZV Port Control and Auto Detect Function Socket Power Lock12.9 SMI 12.11VCC ProtectionPERR, SERR, and Lock System ImplementationClamping Rails PCI Bus InterfaceINTA, INTB, and Intc Prst PCI reset and Grst Global resetDamping resistor on Cclk terminal 4 2-Wire I2C Interface for EepromSocket power supply PC Card InterfaceEeprom ±1. Registers and Bits Loadable Through Serial EepromSample PCI445X Eeprom Data File System Implementation Zoomed Video ZV Interface 1 P2C Interface for TPS22X6 Power SwitchMiscellaneous Signals Interrupt Signaling Interface±2. PC Card Interface Pullup Resistor List² ³ Requirement of Pullup/Pulldown Resistors±4. Miscellaneous Terminals Pullup Resistor List ±3. PCI Bus Interface Pullup Resistor ListLPS ±5. Required Pullup/Pulldown ResistorsInitialization Bios ConsiderationsPCI Standard Registers Initialization PCI TI Proprietary Registers Initialization System Sleeping State ConsiderationDocking System Consideration Register save/restoreImportant Information Topic Global Reset Only Bits, PME Context BitsTable A±1.Global Reset Only Cleared Bits Global Reset Only Bits/PME Context BitsTable A±2.PME Context Bits Page PME and RI Behavior PME and RI Behavior Table B±1.CardBus Ctschg and Wake-Up Signals Truth TablePCI445X Buffer Types PCI445X Buffer Types Signal Name Terminal TypeACVS2 BCAD22 GND PHYDATA6 ZVUV4 TSO Buffer Type Description Table C±2. Buffer Type Abbreviations
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