Texas Instruments PCI445X manual Important Information

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Important Information

1.5 Important Information

This section clarifies important system implementation.

1.5.1G_RST Clamping Rail

G_RST is clamped to VCCP, so removing VCCP causes assertion of G_RST.

Figure 1±7. G_RST and VCCP Relationship

VCCP

VCCP = 0

 

VCCP

 

removed

G_RST

G_RST

All other signals with clamping rails behave the same way.

1.5.2PME/RI_OUT Bit Definition

If PME is selected, only PME is signaled on the PME/RI_OUT terminal. If RI_OUT is selected, only RI_OUT is signaled. The PCI445X device can signal PME and RI_OUT as completely separated signals. In this case RI_OUT should be assigned on the MFUNC terminal.

1.5.3Serialized IRQ Data Stream

PCI clock is needed for operation of the PCI445X serialized IRQ state-machine. During SUSPEND assertion, the PCI445X device stops the IRQSER stream. Before asserting SUSPEND, IRQSER must be stopped.

1.5.4Socket Power Control

An internal or external CLOCK source is needed for the socket power control through the P2C interface. The internal ring oscillator is on while the core VCC is applied to the PCI445X device. External CLOCK source is dependent on the system.

1.5.5External CLOCK Frequency for P2C Interface

If an external P2C CLOCK is used, then it will affect:

￿Advanced CD line noise filtering

￿VS test speed

￿TPS22X6 power control interface speed

Use of the internal ring oscillator is recommended. Recommended external CLOCK source is the 32.768-kHz real-time clock (RTC).

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Contents Implementation Guide Important Notice Read This First About This ManualCsr ±a /user/ti/simuboard/utilities Related Documentation From Texas Instruments Page Contents Viii Figures Tables PCI445X Device Topic±1. Typical System Architecture System Features Selection Socket Power Switches Optional PCI SignalsPCI and ISA Style Interrupt Distributed DMA DdmaSocket Activity LEDs MFUNC7±MFUNC0 Terminal AssignmentsMiscellaneous Functions Description Serialized Interrupt ControlCardBus Reserved Terminal Signaling Power Savings ModeAsynchronous CSC Interrupt Generation Memory Burst R/W Operation ControlSocket Power Lock 12.9 SMI12.11VCC Protection ZV Port Control and Auto Detect FunctionSystem Implementation Clamping RailsPCI Bus Interface PERR, SERR, and LockPrst PCI reset and Grst Global reset INTA, INTB, and Intc4 2-Wire I2C Interface for Eeprom Socket power supplyPC Card Interface Damping resistor on Cclk terminal±1. Registers and Bits Loadable Through Serial Eeprom EepromSample PCI445X Eeprom Data File System Implementation 1 P2C Interface for TPS22X6 Power Switch Zoomed Video ZV InterfaceInterrupt Signaling Interface Miscellaneous SignalsRequirement of Pullup/Pulldown Resistors ±2. PC Card Interface Pullup Resistor List² ³±3. PCI Bus Interface Pullup Resistor List ±4. Miscellaneous Terminals Pullup Resistor List±5. Required Pullup/Pulldown Resistors LPSPCI Standard Registers Initialization Bios ConsiderationsInitialization System Sleeping State Consideration PCI TI Proprietary Registers InitializationRegister save/restore Docking System ConsiderationImportant Information Global Reset Only Bits, PME Context Bits TopicGlobal Reset Only Bits/PME Context Bits Table A±1.Global Reset Only Cleared BitsTable A±2.PME Context Bits Page PME and RI Behavior Table B±1.CardBus Ctschg and Wake-Up Signals Truth Table PME and RI BehaviorPCI445X Buffer Types Signal Name Terminal Type PCI445X Buffer TypesACVS2 BCAD22 GND PHYDATA6 ZVUV4 TSO Table C±2. Buffer Type Abbreviations Buffer Type Description