31994A | AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet |
7 Electrical Data
This chapter describes the electrical characteristics that apply to all desktop AMD Sempron™ processors model 10 with 256K L2 cache.
7.1Conventions
The conventions used in this chapter are as follows:
■Current specified as being sourced by the processor is negative.
■Current specified as being sunk by the processor is positive.
7.2Interface Signal Groupings
The electrical data in this chapter is presented separately for each signal group.
Table 5 defines each group and the signals contained in each group.
Table 5. | Interface Signal Groupings |
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Signal Group | Signals | Notes | ||
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| See “Voltage Identification (VID[4:0])” on page 26, | |
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| VID[4:0], VCCA, VCC_CORE, COREFB, | “VID[4:0] Pins” on page 74, “VCCA AC and DC | |
Power |
| Characteristics” on page 27, “VCC_CORE Characteristics” | ||
| COREFB# | |||
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| on page 28, “VCCA Pin” on page 73, and “COREFB and | ||
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| COREFB# Pins” on page 69. | |
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Frequency |
| FID[3:0] | See “Frequency Identification (FID[3:0])” on page 27 and | |
| “FID[3:0] Pins” on page 70. | |||
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| SYSCLK, SYSCLK# (Tied to CLKIN/CLKIN# | See Table 11, “SYSCLK and SYSCLK# DC Characteristics,” | |
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| on page 31, Table 3, “333 FSB AMD Athlon™ System Bus | ||
System Clocks | and RSTCLK/RSTCLK#), PLLBYPASSCLK#, | |||
AC Characteristics,” on page 23, “SYSCLK and SYSCLK#” | ||||
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| PLLBYPASSCLK | ||
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| on page 73, and “PLL Bypass and Test Pins” on page 72. | ||
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| SADDIN[14:2]#, SADDOUT[14:2]#, | See “333 FSB AMD Sempron™ Processor Model 10 with | |
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| SADDINCLK#, SADDOUTCLK#, SFILLVAL#, | 256K L2 Cache Specifications” on page 21, Table 3, “333 | |
AMD Athlon™ | SDATAINVAL#, SDATAOUTVAL#, | FSB AMD Athlon™ System Bus AC Characteristics,” on | ||
System Bus |
| SDATA[63:0]#, SDATAINCLK[3:0]#, | page 23, Table 4, “333 FSB AMD Athlon™ System Bus DC | |
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| SDATAOUTCLK[3:0]#, CLKFWDRST, | Characteristics,” on page 24, and “CLKFWDRST Pin” on | |
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| PROCRDY, CONNECT | page 68. | |
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Chapter 7 | Electrical Data | 25 |