AMD 10 manual General AC and DC Characteristics

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AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet

31994A—1 August 2004

7.10General AC and DC Characteristics

Table 12 shows the AMD Sempron processor model 10 AC and DC characteristics of the Southbridge, JTAG, test, and miscellaneous pins.

Table 12. General AC and DC Characteristics

Symbol		Parameter Description	Condition		Min		Max		Units		Notes

VIH		Input High Voltage			(VCC_CORE / 2) +		VCC_CORE	+	V		1, 2
VIH		Input High Voltage			200 mV		300 mV		V		1, 2
					200 mV		300 mV

VIL		Input Low Voltage			–300		350		mV		1, 2
VOH		Output High Voltage			VCC_CORE –		VCC_CORE	+	mV
VOH		Output High Voltage			400		300		mV
					400		300

VOL		Output Low Voltage			–300		400		mV
ILEAK_P		Tristate Leakage Pullup	VIN = VSS		–1				mA
ILEAK_P		Tristate Leakage Pullup	(Ground)		–1				mA
			(Ground)

ILEAK_N		Tristate Leakage Pulldown	VIN = VCC_CORE				600		∝A
ILEAK_N		Tristate Leakage Pulldown	Nominal				600		∝A
			Nominal

IOH		Output High Current					–6		mA		3
IOL		Output Low Current			6				mA		3
Notes:
1.	Characterized across DC supply voltage range.
2.	Values specified at nominal VCC_CORE . Scale parameters between VCC_CORE. minimum and VCC_CORE. maximum.
3.	IOL and IOH are measured at VOL maximum and VOH minimum, respectively.
4.	Synchronous inputs/outputs are specified with respect to RSTCLK and RSTCK# at the pins.
5.	These are aggregate numbers.
6.	Edge rates indicate the range over which inputs were characterized.
7.	In asynchronous operation, the signal must persist for this time to enable capture.
8.	This value assumes RSTCLK period is 10 ns ==> TBIT = 2*fRST.
9.	The approximate value for standard case in normal mode operation.
10.	This value is dependent on RSTCLK frequency, divisors, Low Power mode, and core frequency.
11.	Reassertions of the signal within this time are not guaranteed to be seen by the core.
12.	This value assumes that the skew between RSTCLK and K7CLKOUT is much less than one phase.
13.	This value assumes RSTCLK and K7CLKOUT are running at the same frequency, though the processor is capable of other
	configurations.
14.	Time to valid is for any open-drain pins. See requirements 7 and 8			in the “Power-Up Timing Requirements“ chapter for more
	information.

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Electrical Data

Chapter 7

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Contents Data Sheet Advanced Micro Devices, Inc. All rights reserved Table of Contents Mechanical Data Ordering Information AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Typical AMD Sempron Processor Model 10 System Block Diagram List of FiguresViii List of Tables List of Tables Revision History Date Rev DescriptionXii Overview Chapter QuantiSpeed Architecture Summary Typical AMD Sempron Processor Model 10 System Block Diagram Overview Interface SignalsSignaling Technology AMD Athlon System Bus Signals Push-Pull PP DriversLogic Symbol Diagram Processor ModelFrequency Control Front-Side Bus Autodetect Legacy DiodeAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Power Management Power Management StatesWorking State Halt StateChapter Power Management Probe State Connect ProtocolAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Procrdy Exiting the Stop Grant State and Bus Connect Sequence Diagram Connect StateConnect Pending Disconnect Disconnect4/C Disconnect requestReturn internal clocks to full speed and assert NorthbridgeClock Control Cpuid Support AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet 256K L2 Cache Specifications Duty Cycle Parameter Description Minimum MaximumClock Frequency 333 FSB AMD Athlon System Bus AC Characteristics 333 FSB AMD Athlon System Bus DC Characteristics FSB AMD Athlon System Bus DC CharacteristicsInterface Signal Groupings Interface Signal GroupingsElectrical Data ConventionsVID40 DC Characteristics Voltage Identification VID40Vcca AC and DC Characteristics FID30 DC CharacteristicsFrequency Identification FID30 DecouplingVcccore Characteristics Vcccore AC and DC CharacteristicsVcccore Voltage Waveform Absolute Ratings Absolute RatingsSysclk and SYSCLK# DC Characteristics Sysclk and SYSCLK# DC CharacteristicsGeneral AC and DC Characteristics General AC and DC CharacteristicsSync Input Setup Time Signal Rise TimeSignal Fall Time Sync Input Hold TimeOpen Drain Test Circuit 50 Ω ±3% Open-Drain Pin IOL = Output Current2Thermal Diode Characteristics CharacteristicsThermal Diode Electrical Characteristics Thermal DiodeAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Guidelines for Platform Thermal Protection of the Processor Apic Pins AC and DC CharacteristicsApic Pin AC and DC Characteristics Setup Time Hold TimeSignal and Power-Up Requirements Power-Up RequirementsPwrok AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Selection FID30 Processor Warm Reset RequirementsClock Multiplier Mechanical Data Die LoadingMechanical Loading Location Dynamic MAX Static MAX Units Die Surface 100Letter or Minimum Maximum 453Chapter Mechanical Data Dimension 49.27 49.78 D1/E1 45.72 BSC 917 REF 42 REF 977 Chapter Mechanical Data AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Pin Diagram and Pin Name Abbreviations Pin DescriptionsModel AMD Sempron Processor Model 10 Pin Diagram-Bottomside View AMD Sempron ProcessorPin Name Abbreviations Abbreviation Full Name Pin Q31 S31 U31 U37 W31 Y31 Y33 AA31AC31 AD30AE33 AJ35AG37 AL33W33 J35E27 E15F24 F28F32 F34AK34 AK36AM10 AM14V30 V32V34 V36Pin List Cross-Reference by Pin Location Pin NameNo Pin A35 SDATA40# A37 SDATA30#SDATA52# E11 SDATA50# E13 SDATA49# E15 E29 SDATA33# E31 SDATA32# Pin NameE33 NC Pin E35 SDATA31# E37 SDATA22# NC Pin F10NC Pin H10 H12 H28 NC Pin H30 H32 H34NC Pin VID4 J31 J33 SDATA19# J35 J37 SDATA29#Key Pin Q31 NC Pin Q33 SDATA24# Q35 SDATA17# Q37 SDATA16# S31 NC Pin S33S35 SDATA15# S37 U31 NC Pin U33FID0 FID1 NC Pin W31 W33FID2 FID3 NC Pin Key Pin Y31 Y33 Y35 Y37 SDATA12#NC Pin AD30 AD32 AE31 NC Pin AE33NC Pin AF10 AF12 AF20AH30 FSBSense1 AH32 NC Pin AJ11 AJ13 Analog AJ15 AJ17 AJ19 AJ21AJ27 NC Pin AJ29 NC Pin AK10AL25 NC Pin AL27 AL29 NC Pin AM10NC Pin AN11 AN13 AN25 NC Pin AN27 AN29Detailed Pin Descriptions Sysclk Pins COREFB# PinsPins Connect PinFID30 Pins FID30 Clock Multiplier EncodingsFront-Side Bus Sense Truth Table FLUSH# PinIGNNE# Pin INIT# PinJtag Pins K7CLKOUT# PinsKey Pins NC PinsSADDOUT10# Pins Scan PinsThermdc Pins Pwrok PinVID40 Code to Voltage Definition VID40 PinsVrefsys Pin ZN and ZP Pins AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Ordering Information Standard AMD Sempron Processor Model 10 ProductsAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Ideal Diode Equation Constants and Variables for the Ideal Diode EquationTemperature Offset Correction ⎛--- I-- high------ ⎞ AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Signals and Bits Appendix BData Terminology Abbreviation Meaning Abbreviations and AcronymsAbbreviations Acronyms APINMI VGA Related Publications AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet

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