AMD 10 manual FID30 Pins, FID30 Clock Multiplier Encodings

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AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet

31994A—1 August 2004

FID[3:0] Pins	FID[3] (Y3), FID[2] (Y1), FID[1] (W3), and FID[0] (W1) are the
	4-bit processor clock-to-SYSCLK ratio.
	Table 21 describes the encodings of the clock multipliers on
	FID[3:0].

Table 21. FID[3:0] Clock Multiplier Encodings

FID[3:0]2	Processor Clock to SYSCLK Frequency Ratio
0000	11

0001	11.5

0010	12

0011	≥ 12.51
0100	5

0101	5.5

0110	6

0111	6.5

1000	7

1001	7.5

1010	8

1011	8.5

1100	9

1101	9.5

1110	10

1111	10.5

Notes:

1. All ratios greater than or equal to 12.5x have the same FID[3:0] code of 0011b, which causes the SIP configuration for all ratios of 12.5x or greater to be the same.

2. BIOS initializes the CLK_Ctl MSR during the POST routine. This CLK_Ctl setting is used with all FID combinations and selects a Halt disconnect divisor and a Stop Grant disconnect divisor. For more information, refer to the AMD Athlon™ and AMD Duron™ Processors BIOS, Software, and Debug Developers Guide, order# 21656.

The FID[3:0] signals are open-drain processor outputs that are pulled High on the motherboard and sampled by the chipset to determine the SIP (serial initialization packet) that is sent to the processor. The FID[3:0] signals are valid after PWROK is asserted. The FID[3:0]signals must not be sampled until they become valid. See the AMD Athlon™ and AMD Duron™ System Bus Specification, order# 21902 for more information about Serialization Initialization Packets and SIP protocol.

The processor FID[3:0] outputs are open-drain and 2.5-V tolerant. To prevent damage to the processor, do not pull these

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Pin Descriptions

Chapter 10

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Contents Data Sheet Advanced Micro Devices, Inc. All rights reserved Table of Contents Mechanical Data Ordering Information AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Typical AMD Sempron Processor Model 10 System Block Diagram List of FiguresViii List of Tables List of Tables Revision History Date Rev DescriptionXii Overview Chapter QuantiSpeed Architecture Summary Typical AMD Sempron Processor Model 10 System Block Diagram Signaling Technology Interface SignalsOverview AMD Athlon System Bus Signals Push-Pull PP DriversFrequency Control Front-Side Bus Autodetect Legacy Logic Symbol DiagramProcessor Model DiodeAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Power Management Power Management StatesWorking State Halt StateChapter Power Management Probe State Connect ProtocolAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Procrdy Exiting the Stop Grant State and Bus Connect Sequence Diagram Connect StateReturn internal clocks to full speed and assert Connect Pending Disconnect Disconnect4/CDisconnect request NorthbridgeClock Control Cpuid Support AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet 256K L2 Cache Specifications Clock Frequency Parameter Description Minimum MaximumDuty Cycle 333 FSB AMD Athlon System Bus AC Characteristics 333 FSB AMD Athlon System Bus DC Characteristics FSB AMD Athlon System Bus DC CharacteristicsElectrical Data Interface Signal GroupingsInterface Signal Groupings ConventionsVID40 DC Characteristics Voltage Identification VID40Frequency Identification FID30 Vcca AC and DC CharacteristicsFID30 DC Characteristics DecouplingVcccore Characteristics Vcccore AC and DC CharacteristicsVcccore Voltage Waveform Absolute Ratings Absolute RatingsSysclk and SYSCLK# DC Characteristics Sysclk and SYSCLK# DC CharacteristicsGeneral AC and DC Characteristics General AC and DC CharacteristicsSignal Fall Time Sync Input Setup TimeSignal Rise Time Sync Input Hold TimeOpen Drain Test Circuit 50 Ω ±3% Open-Drain Pin IOL = Output Current2Thermal Diode Electrical Characteristics Thermal Diode CharacteristicsCharacteristics Thermal DiodeAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Apic Pin AC and DC Characteristics Apic Pins AC and DC CharacteristicsGuidelines for Platform Thermal Protection of the Processor Setup Time Hold TimeSignal and Power-Up Requirements Power-Up RequirementsPwrok AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Clock Multiplier Processor Warm Reset RequirementsSelection FID30 Mechanical Loading Mechanical DataDie Loading Location Dynamic MAX Static MAX Units Die Surface 100Letter or Minimum Maximum 453Chapter Mechanical Data Dimension 49.27 49.78 D1/E1 45.72 BSC 917 REF 42 REF 977 Chapter Mechanical Data AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Pin Diagram and Pin Name Abbreviations Pin DescriptionsModel AMD Sempron Processor Model 10 Pin Diagram-Bottomside View AMD Sempron ProcessorPin Name Abbreviations AC31 Abbreviation Full Name Pin Q31 S31 U31 U37 W31 Y31 Y33AA31 AD30AG37 AE33AJ35 AL33E27 W33J35 E15F32 F24F28 F34AM10 AK34AK36 AM14V34 V30V32 V36Pin List No Pin Cross-Reference by Pin LocationPin Name A35 SDATA40# A37 SDATA30#E33 NC Pin E35 SDATA31# E37 SDATA22# SDATA52# E11 SDATA50# E13 SDATA49# E15E29 SDATA33# E31 SDATA32# Pin Name NC Pin F10NC Pin VID4 J31 J33 SDATA19# J35 NC Pin H10 H12H28 NC Pin H30 H32 H34 J37 SDATA29#S35 SDATA15# S37 Key Pin Q31 NC Pin Q33 SDATA24# Q35 SDATA17# Q37 SDATA16#S31 NC Pin S33 U31 NC Pin U33FID2 FID3 NC Pin Key Pin Y31 Y33 Y35 FID0 FID1NC Pin W31 W33 Y37 SDATA12#NC Pin AF10 AF12 NC Pin AD30 AD32AE31 NC Pin AE33 AF20AJ27 NC Pin AJ29 AH30 FSBSense1 AH32NC Pin AJ11 AJ13 Analog AJ15 AJ17 AJ19 AJ21 NC Pin AK10NC Pin AN11 AN13 AL25 NC Pin AL27 AL29NC Pin AM10 AN25 NC Pin AN27 AN29Detailed Pin Descriptions Pins Sysclk PinsCOREFB# Pins Connect PinFID30 Pins FID30 Clock Multiplier EncodingsIGNNE# Pin Front-Side Bus Sense Truth TableFLUSH# Pin INIT# PinKey Pins Jtag PinsK7CLKOUT# Pins NC PinsThermdc Pins SADDOUT10# PinsScan Pins Pwrok PinVrefsys Pin VID40 PinsVID40 Code to Voltage Definition ZN and ZP Pins AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Ordering Information Standard AMD Sempron Processor Model 10 ProductsAMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Ideal Diode Equation Constants and Variables for the Ideal Diode EquationTemperature Offset Correction ⎛--- I-- high------ ⎞ AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Signals and Bits Appendix BData Terminology Abbreviations Abbreviations and AcronymsAbbreviation Meaning Acronyms APINMI VGA Related Publications AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet

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