31994A | AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet | |
List of Figures |
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Figure 1. Typical AMD Sempron™ Processor Model 10 System |
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| Block Diagram | . 4 |
Figure 2. Logic Symbol Diagram | . 7 | |
Figure 3. AMD Sempron Processor Model 10 Power |
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| Management States | . 9 |
Figure 4. AMD Athlon™ System Bus Disconnect Sequence in |
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| the Stop Grant State | 14 |
Figure 5. Exiting the Stop Grant State and Bus Connect Sequence | 15 | |
Figure 6. Northbridge Connect State Diagram | 16 | |
Figure 7. Processor Connect State Diagram | 17 | |
Figure 8. | SYSCLK Waveform | 22 |
Figure 9. | VCC_CORE Voltage Waveform | 29 |
Figure 10. SYSCLK and SYSCLK# Differential Clock Signals . . . . . . . . . . 31
Figure 11. General ATE Open-Drain Test Circuit. . . . . . . . . . . . . . . . . . . . . 34
Figure 12. Signal Relationship Requirements During Power-Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 13. AMD Sempron Processor Model 10 Part Number
27488 OPGA Package Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 14. AMD Sempron Processor Model 10 Part Number
27493 OPGA Package Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 15. AMD Sempron Processor Model 10 Pin Diagram—
Topside View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 16. AMD Sempron Processor Model 10 Pin Diagram— Bottomside View. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 17. OPN Example for the AMD Sempron Processor
Model 10 with 256K L2 Cache. . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
List of Figures | vii |