Omega Engineering OME-PIO-D96 manual I/O Address Map, Address Read Write

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3.3The I/O Address Map

The I/O address of OME-PIO/PISO series card is automatically assigned by the main board ROM BIOS. The I/O address can also be re- assigned by user. It is strongly recommended not to change the I/O address by user. The plug & play BIOS will assign proper I/O address to each OME-PIO/PISO series card very well. The I/O addresses of OME- PIO-D96 are given as follows:

Address	Read	Write
Wbase+0	RESET\ control register	Same
Wbase+2	Aux control register	Same
Wbase+3	Aux data register	Same

Wbase+5	INT mask control register	Same
Wbase+7	Aux pin status register	Same
Wbase+0x2a	INT polarity control register	Same

Wbase+0xc0	read Port0	write Port0
Wbase+0xc4	read Port1	write Port1
Wbase+0xc8	read Port2	write Port2
Wbase+0xcc	×	Port0~Port2 configuration
Wbase+0xd0	read Port3	write Port3
Wbase+0xd4	read Port4	write Port4
Wbase+0xd8	read Port5	write Port5
Wbase+0xdc	×	Port3~Port5 configuration
Wbase+0xe0	read Port6	write Port6
Wbase+0xe4	read Port7	write Port7
Wbase+0xe8	read Port8	write Port8
Wbase+0xec	×	Port6~Port8 configuration
Wbase+0xf0	read Port9	write Port9
Wbase+0xf4	read Port10	write Port10
Wbase+0xf8	read Port11	write Port11
Wbase+0xfc	×	Port9~Port11 configuration

Note. Refer to Sec. 3.1 for more information about wBase.

OME-PIO-D96 User Manual (Ver.1.1, Mar/2003)

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Contents User’sGuide Canada MexicoBenelux Czech RepublicOME-PIO-D96 Table of Contents Features IntroductionOptions SpecificationsOrder Description OME-PISO-series cost-effective generation, isolated cards PCI Data Acquisition FamilyProduct Check List Hardware configuration Board LayoutRefer to DEMO1.C for demo program Enable I/O OperationI/O port Location D/I/O Architecture Interrupt Operation Make sure the initial level is High or LowInterrupt Block Diagram of OME-PIO-D96 INTCHAN3INTCHAN0/1/2/3 Initialhigh, activelow Interrupt source COUNTL++Initiallow, activehigh Interrupt source Muliti Interrupt Source Read all interrupt state Daughter Boards OME-DB-37OME-DN-37 & OME-DN-50 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P/24PD Isolated Input Board OME-DB-24R/24RD Relay Board OME-DB-24PR/24POR/24C Daughter Boards Comparison Table All signals are TTL compatible Pin AssignmentVCC GND How to Find the I/O Address Resource-allocated informationOME-PIO/PISO identification information PC’s physical slot informationWSubVendor=0x80 wSubDevice=1 wSubAux=0x10 /* for PIOD96 PIODriverInitPIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAux Current sinking Enable all D/I/O operation of card1 PIOGetConfigAddressSpaceEnable all D/I/O operation of card0 ShowPIOPISO ShowPIOPISOwSubVendor,wSubDevice,wSubAuxAssignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07I/O Address Map Address Read WriteAUX data Register RESET\ Control RegisterAUX Control Register INT Mask Control Register Aux Status RegisterInterrupt Polarity Control Register INV3 INV2 INV1 INV07 I/O Selection Control Register Read/Write 8-bit data Register How to install software & utility? Demo programPiopiso PIOPISO.EXE for Windows DEMO1 DEMO2 DEMO3 COUNTL++ DEMO4 COUNTL++ DEMO5 CNTL1=CNTL2=CNTL3=CNTL4=0 Page WARRANTY/DISCLAIMER Temperature