Omega Engineering OME-PIO-D96 manual INTCHAN0/1/2/3

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2.5.2 INT_CHAN_0/1/2/3
INT_CHAN_0 (1/2/3)	P2C0(P5C0/P8C0/P11C0)
	Inverted/Noninverted select
	INV0(1/2/3)
	Enable/Disable select
	EN0(1/2/3)

The INT_CHAN_0(1/2/3) must be fixed in low level state normally and generated a high_pulse to interrupt the PC.

The EN0 (EN1/EN2/EN3) can be used to enable/disable the INT_CHAN_0(1/2/3) as follows: (Refer to Sec. 3.3.4)

EN0 (1/2/3) = 0 → INT_CHAN_0(1/2/3) = disable EN0 (1/2/3) = 1 → INT_CHAN_0(1/2/3) = enable

The INV0 can be used to invert/non-invert the PC0 (1/2/3) as follows: (Refer to Sec.3.3.6)

INV0 (1/2/3) = 0 → INT_CHAN_0(1/2/3) = inverted state of P2C0 (P5C0/P8C0/P11C0)

INV0 (1/2/3) = 1 → INT_CHAN_0(1/2/3) = non-inverted state of P2C0 (P5C0/P8C0/P11C0)

OME-PIO-D96 User Manual (Ver.1.1, Mar/2003)

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Contents User’sGuide Mexico CanadaBenelux Czech RepublicOME-PIO-D96 Table of Contents Introduction FeaturesOrder Description SpecificationsOptions Product Check List PCI Data Acquisition FamilyOME-PISO-series cost-effective generation, isolated cards Board Layout Hardware configurationI/O port Location Enable I/O OperationRefer to DEMO1.C for demo program D/I/O Architecture Make sure the initial level is High or Low Interrupt OperationINTCHAN3 Interrupt Block Diagram of OME-PIO-D96INTCHAN0/1/2/3 COUNTL++ Initialhigh, activelow Interrupt sourceInitiallow, activehigh Interrupt source Muliti Interrupt Source Read all interrupt state OME-DB-37 Daughter BoardsOME-DN-37 & OME-DN-50 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P/24PD Isolated Input Board OME-DB-24R/24RD Relay Board OME-DB-24PR/24POR/24C Daughter Boards Comparison Table Pin Assignment All signals are TTL compatibleVCC GND Resource-allocated information How to Find the I/O AddressOME-PIO/PISO identification information PC’s physical slot informationPIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAux PIODriverInitWSubVendor=0x80 wSubDevice=1 wSubAux=0x10 /* for PIOD96 Current sinking Enable all D/I/O operation of card0 PIOGetConfigAddressSpaceEnable all D/I/O operation of card1 ShowPIOPISOwSubVendor,wSubDevice,wSubAux ShowPIOPISOSlot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07 Assignment of I/O AddressAddress Read Write I/O Address MapAUX Control Register RESET\ Control RegisterAUX data Register Aux Status Register INT Mask Control RegisterINV3 INV2 INV1 INV0 Interrupt Polarity Control Register7 I/O Selection Control Register Read/Write 8-bit data Register Demo program How to install software & utility?Piopiso PIOPISO.EXE for Windows DEMO1 DEMO2 DEMO3 COUNTL++ DEMO4 COUNTL++ DEMO5 CNTL1=CNTL2=CNTL3=CNTL4=0 Page WARRANTY/DISCLAIMER Temperature