Omega Engineering OME-PIO-D96 manual D/I/O Architecture

Page 10

2.4D/I/O Architecture

I/O select (Sec. 3.3.7)

RESET\ (Sec. 3.3.1)

disable\

Data

input Latch

(Sec. 3.3.8)

Clock input

D/O latch CKT

disable

Data

Buffer input

(Sec. 3.3.8)

Clock input

D/I buffer CKT

D/I/O

•The RESET\ is in Low-state Æ all D/I/O are disabled

•The RESET\ is in High-state Æ all D/I/O are enabled

•If D/I/O is configured as D/I port Æ D/I= external input signal

•If D/I/O is configured as D/O port Æ D/I = read back D/O

•If D/I/O is configured as D/I port Æ send to D/O will change the D/O latch register only. The D/I & external input signal will not change

OME-PIO-D96 User Manual (Ver.1.1, Mar/2003)

---- 8

Image 10

Contents User’sGuide Benelux CanadaMexico Czech RepublicOME-PIO-D96 Table of Contents Features IntroductionOrder Description SpecificationsOptions Product Check List PCI Data Acquisition FamilyOME-PISO-series cost-effective generation, isolated cards Hardware configuration Board LayoutI/O port Location Enable I/O OperationRefer to DEMO1.C for demo program D/I/O Architecture Interrupt Operation Make sure the initial level is High or LowInterrupt Block Diagram of OME-PIO-D96 INTCHAN3INTCHAN0/1/2/3 Initialhigh, activelow Interrupt source COUNTL++Initiallow, activehigh Interrupt source Muliti Interrupt Source Read all interrupt state OME-DN-37 & OME-DN-50 Daughter BoardsOME-DB-37 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P/24PD Isolated Input Board OME-DB-24R/24RD Relay Board OME-DB-24PR/24POR/24C Daughter Boards Comparison Table All signals are TTL compatible Pin AssignmentVCC GND OME-PIO/PISO identification information How to Find the I/O AddressResource-allocated information PC’s physical slot informationPIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAux PIODriverInitWSubVendor=0x80 wSubDevice=1 wSubAux=0x10 /* for PIOD96 Current sinking Enable all D/I/O operation of card0 PIOGetConfigAddressSpaceEnable all D/I/O operation of card1 ShowPIOPISO ShowPIOPISOwSubVendor,wSubDevice,wSubAuxAssignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07I/O Address Map Address Read WriteAUX Control Register RESET\ Control RegisterAUX data Register INT Mask Control Register Aux Status RegisterInterrupt Polarity Control Register INV3 INV2 INV1 INV07 I/O Selection Control Register Read/Write 8-bit data Register How to install software & utility? Demo programPiopiso PIOPISO.EXE for Windows DEMO1 DEMO2 DEMO3 COUNTL++ DEMO4 COUNTL++ DEMO5 CNTL1=CNTL2=CNTL3=CNTL4=0 Page WARRANTY/DISCLAIMER Temperature