Omega Engineering OME-PIO-D96 manual I/O port Location, Enable I/O Operation

Page 9

2.2I/O port Location

There are twelve 8-bit I/O ports in the OME-PIO-D96. Every I/O port can be programmed as D/I or D/O port. When the PC is first powered up, all twelve ports are used as D/I port. The I/O port location is given as follows:

Connector of OME-PIO-D96

PA0 ~ PA7

PB0 ~ PB7

PC0 ~ PC7

CN1

Port0

Port1

Port2

CN2

Port3

Port4

Port5

CN3

Port6

Port7

Port8

CN4

Port9

Port10

Port11

Refer to Sec. 2.1 for board layout & I/O port location.

Note: Each PC0 can be used as interrupt signal source. Refer to Sec. 2.5 for more information.

2.3Enable I/O Operation

When the PC is powered up, all D/I/O ports are disabled. The enable/disable of D/I/O is controlled by the RESET\ signal. Refer to Sec. 3.3.1 for more information about RESET\ signal. The power-up states are given as follows:

All D/I/O operations are disabled

All twelve D/I/O ports are configured as D/I port

All D/O latch register are undefined.(refer to Sec. 2.4)

The user has to perform some initialization before using these D/I/Os. These recommended steps are given as follows:

Step 1: find address-mapping of PIO/PISO cards (refer to Sec. 3.1)

Step 2: enable all D/I/O operation (refer to Sec. 3.3.1)

Step 3: configure the first three ports to their expected D/I/O state & send the initial value to all D/O ports (refer to Sec. 3.3.7)

Step 4: configure the other three ports to their expected D/I/O state & send the initial value to all D/O ports(refer to Sec. 3.3.7)

Refer to DEMO1.C for demo program.

OME-PIO-D96 User Manual (Ver.1.1, Mar/2003)

---- 7

Image 9
Contents User’sGuide Mexico CanadaBenelux Czech RepublicOME-PIO-D96 Table of Contents Introduction FeaturesSpecifications Order DescriptionOptions PCI Data Acquisition Family Product Check ListOME-PISO-series cost-effective generation, isolated cards Board Layout Hardware configurationEnable I/O Operation I/O port LocationRefer to DEMO1.C for demo program D/I/O Architecture Make sure the initial level is High or Low Interrupt OperationINTCHAN3 Interrupt Block Diagram of OME-PIO-D96INTCHAN0/1/2/3 COUNTL++ Initialhigh, activelow Interrupt sourceInitiallow, activehigh Interrupt source Muliti Interrupt Source Read all interrupt state OME-DB-37 Daughter BoardsOME-DN-37 & OME-DN-50 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P/24PD Isolated Input Board OME-DB-24R/24RD Relay Board OME-DB-24PR/24POR/24C Daughter Boards Comparison Table Pin Assignment All signals are TTL compatibleVCC GND Resource-allocated information How to Find the I/O AddressOME-PIO/PISO identification information PC’s physical slot informationPIODriverInit PIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAuxWSubVendor=0x80 wSubDevice=1 wSubAux=0x10 /* for PIOD96 Current sinking PIOGetConfigAddressSpace Enable all D/I/O operation of card0Enable all D/I/O operation of card1 ShowPIOPISOwSubVendor,wSubDevice,wSubAux ShowPIOPISOSlot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07 Assignment of I/O AddressAddress Read Write I/O Address MapRESET\ Control Register AUX Control RegisterAUX data Register Aux Status Register INT Mask Control RegisterINV3 INV2 INV1 INV0 Interrupt Polarity Control Register7 I/O Selection Control Register Read/Write 8-bit data Register Demo program How to install software & utility?Piopiso PIOPISO.EXE for Windows DEMO1 DEMO2 DEMO3 COUNTL++ DEMO4 COUNTL++ DEMO5 CNTL1=CNTL2=CNTL3=CNTL4=0 Page WARRANTY/DISCLAIMER Temperature