Omega Vehicle Security OME-PIO-D56 manual Interrupt Polarity Control Register

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3.3.6Interrupt Polarity Control Register

(Read/Write): wBase+0x2A

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0

0

0

0

INV3

INV2

INV1

INV0

Note. Refer to Sec. 3.1 for more information about wBase.

INV0=1Æ select the non-inverted signal from PC0

INV0=0Æ select the inverted signal from PC0

outportb(wBase+0x2a,0x0f);

/* select the non-inverted input PC0/1/2/3

*/

outportb(wBase+0x2a,0x00);

/* select the inverted input of PC0/1/2/3

*/

outportb(wBase+0x2a,0x0e); /* select the inverted input of PC0

*/

 

/* select the non-inverted input PC1/2/3

*/

outportb(wBase+0x2a,0x0c); /* select the inverted input of PC0/1

*/

 

/* select the non-inverted input PC2/3

*/

Refer to Sec. 2.4 for more information.

Refer to DEMO5.C for more information.

3.3.7I/O Selection Control Register

(Write): wBase+0xcc

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0

0

0

0

0

Port2

Port1

Port0

Note. Refer to Sec. 3.1 for more information about wBase.

Port? = 1Æ this port is used as a D/O port

Port? = 0Æ this port is used as a D/I port

outportb(wBase+0xcc,0x00);

/* configure Port0/1/2 as D/I port

*/

outportb(wBase+0xcc,0x04);

/* configure Port0/1 as D/I port

*/

 

/* configure Port2 as D/O port

*/

OME-PIO-D56/PIO-D24 User Manual (Ver.2.1, Oct/2003, PPH-005-21)

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Contents User’sGuide Benelux CanadaMexico Czech RepublicOME-PIO-D56/D24 Table of Contents Features IntroductionOptions SpecificationsOrder Description OME-PISO-series cost-effective generation, isolated cards Product ChecklistPCI Data Acquisition Family Hardware configuration Board Layout1 DI/DO Port Architecture CON3 I/O Port LocationEnabling I/O Operation Select Sec RESET\ Sec DI Port Architecture CON2 Do Port Architecture CON1 Make sure the initial level is High or Low If INT signal is Low now Æ select the non-inverted inputInterrupt Operation Interrupt Block Diagram of OME-PIO D56/D24 Interrupt output signal of OME-PIO-D56/OME-PIO-D24, INT\ isINTCHAN0/1/2/3 Initialhigh, activelow Interrupt source COUNTL++Initiallow, activehigh Interrupt source Muliti-Interrupt Source PC0 PC1 PC2 PC3Read all interrupt state OME-DN-37 Daughter BoardsOME-DB-37 OME-DB-8125OME-ADP-20/PCI OME-DB-24PD Isolated Input Board OME-DB-24RD Relay Board OME-DB-24PRD, OME-DB-24POR, OME DB-24C Daughter Board Comparison Table All signals are TTL compatible Pin AssignmentDI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 PIO/PISO identification information How to Find the I/O AddressResource-allocated information PC’s physical slot informationWSubVendor=0x80 wSubDevice=1 wSubAux=0x40 For PIODriverInitPIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAux D56/D24Printf\nThrer are %d Piopiso Cards in this PC,wBoards OME-PISO-P32C32 Enable all D/I/O operations of card1 PIOGetConfigAddressSpaceEnable all D/I/O operations of card0 ShowPIOPISO ShowPIOPISOwSubVendor,wSubDevice,wSubAuxAssignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07I/O Address Map Address Read WriteAUX data Register RESET\ Control RegisterAUX Control Register INT Mask Control Register Aux Status RegisterInterrupt Polarity Control Register 7 I/O Selection Control RegisterRead/Write 8-bit data Register How to install software & utility? Demo programPiopiso PIOPISO.EXE for Windows DEMO1 DEMO2 DEMO3 COUNT=0COUNT++ DEMO4 COUNT++ DEMO5 PC3CNTL1=CNTL2=CNTL3=CNTL4=0 Page WARRANTY/DISCLAIMER Temperature