3.3.6Interrupt Polarity Control Register
(Read/Write): wBase+0x2A
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
0 | 0 | 0 | 0 | INV3 | INV2 | INV1 | INV0 |
Note. Refer to Sec. 3.1 for more information about wBase.
INV0=1Æ select the
INV0=0Æ select the inverted signal from PC0
outportb(wBase+0x2a,0x0f); | /* select the | */ |
outportb(wBase+0x2a,0x00); | /* select the inverted input of PC0/1/2/3 | */ |
outportb(wBase+0x2a,0x0e); /* select the inverted input of PC0 | */ | |
| /* select the | */ |
outportb(wBase+0x2a,0x0c); /* select the inverted input of PC0/1 | */ | |
| /* select the | */ |
Refer to Sec. 2.4 for more information.
Refer to DEMO5.C for more information.
3.3.7I/O Selection Control Register
(Write): wBase+0xcc
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
0 | 0 | 0 | 0 | 0 | Port2 | Port1 | Port0 |
Note. Refer to Sec. 3.1 for more information about wBase.
Port? = 1Æ this port is used as a D/O port
Port? = 0Æ this port is used as a D/I port
outportb(wBase+0xcc,0x00); | /* configure Port0/1/2 as D/I port | */ |
outportb(wBase+0xcc,0x04); | /* configure Port0/1 as D/I port | */ |
| /* configure Port2 as D/O port | */ |