Omega Vehicle Security OME-PIO-D56 manual Interrupt Block Diagram of OME-PIO D56/D24

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2.4.1Interrupt Block Diagram of OME-PIO-

D56/D24
	INT_CHAN_0
INT\	INT_CHAN_1
INT\
Level_trigger	INT_CHAN_2
Level_trigger
	INT_CHAN_3
	initial_low
	active_high

The interrupt output signal of OME-PIO-D56/OME-PIO-D24, INT\ is

Level_trigger & Active_Low. If the INT\ generates a low pulse, the OME-PIO- D56/OME-PIO-D24 will interrupt the PC only once. If the INT\ is fixed in low level, the OME-PIO-D56/OME-PIO-D24 will interrupt the PC continuously.

INT_CHAN_0/1/2/3 must be controlled in a pulse type signals. It must be fixed in low level state normally and generate a high pulse to interrupt the PC.

The priority of INT_CHAN_0/1/2/3 is the same. If all these four signals are active at the same time, then INT\ will be active only one time. So the interrupt service routine has to read the status of all interrupt channels for a multi-channel interrupt. Refer to Sec. 2.4 for mare information.

DEMO5.C → for multi-channel interrupt source

If only one interrupt source is used, the interrupt service routine does not have to read the status of interrupt source. The demo programs DEMO3.C and DEMO4.C are designed for single-channel interrupt demo, as follows:

DEMO3.C → for INT_CHAN_0 only (PC0 initial low) DEMO4.C → for INT_CHAN_0 only (PC0 initial high)

OME-PIO-D56/PIO-D24 User Manual (Ver.2.1, Oct/2003, PPH-005-21)

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Contents User’sGuide Benelux CanadaMexico Czech RepublicOME-PIO-D56/D24 Table of Contents Features IntroductionOptions SpecificationsOrder Description OME-PISO-series cost-effective generation, isolated cards Product ChecklistPCI Data Acquisition Family Hardware configuration Board Layout1 DI/DO Port Architecture CON3 I/O Port LocationEnabling I/O Operation Select Sec RESET\ Sec DI Port Architecture CON2 Do Port Architecture CON1 Make sure the initial level is High or Low If INT signal is Low now Æ select the non-inverted inputInterrupt Operation Interrupt Block Diagram of OME-PIO D56/D24 Interrupt output signal of OME-PIO-D56/OME-PIO-D24, INT\ isINTCHAN0/1/2/3 Initialhigh, activelow Interrupt source COUNTL++Initiallow, activehigh Interrupt source Muliti-Interrupt Source PC0 PC1 PC2 PC3Read all interrupt state OME-DN-37 Daughter BoardsOME-DB-37 OME-DB-8125OME-ADP-20/PCI OME-DB-24PD Isolated Input Board OME-DB-24RD Relay Board OME-DB-24PRD, OME-DB-24POR, OME DB-24C Daughter Board Comparison Table All signals are TTL compatible Pin AssignmentDI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 PIO/PISO identification information How to Find the I/O AddressResource-allocated information PC’s physical slot informationWSubVendor=0x80 wSubDevice=1 wSubAux=0x40 For PIODriverInitPIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAux D56/D24Printf\nThrer are %d Piopiso Cards in this PC,wBoards OME-PISO-P32C32 Enable all D/I/O operations of card1 PIOGetConfigAddressSpaceEnable all D/I/O operations of card0 ShowPIOPISO ShowPIOPISOwSubVendor,wSubDevice,wSubAuxAssignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07I/O Address Map Address Read WriteAUX data Register RESET\ Control RegisterAUX Control Register INT Mask Control Register Aux Status RegisterInterrupt Polarity Control Register 7 I/O Selection Control RegisterRead/Write 8-bit data Register How to install software & utility? Demo programPiopiso PIOPISO.EXE for Windows DEMO1 DEMO2 DEMO3 COUNT=0COUNT++ DEMO4 COUNT++ DEMO5 PC3CNTL1=CNTL2=CNTL3=CNTL4=0 Page WARRANTY/DISCLAIMER Temperature