Omega Vehicle Security OME-PIO-D56 manual Count++

Page 48

}

else

{

irqmask=inportb(A1_8259+1);

outportb(A1_8259+1,irqmask & 0xfb);/* IRQ2 */ irqmask=inportb(A2_8259+1);

outportb(A2_8259+1,irqmask & 0xff ^ (1<<(wIrq-8))); setvect(wIrq-8+0x70,irq_service);

}

outportb(wBase+5,1);

/* enable interrupt (PC0)

*/

now_int_state=1;

/* now ini_signal is high

*/

outportb(wBase+0x2a,0);

/* select the inverte

*/

enable();

 

 

}

 

 

void interrupt irq_service()

 

 

{

/* now PC0 change to low

*/

if (now_int_state==1)

{

/* INT_CHAN_0 = !PC0

*/

COUNT++;

/* PC0 still fixed in low

*/

if ((inportb(wBase+7)&1)==0)

{

/* need to generate a high pulse */

outportb(wBase+0x2a,1);

/* INV0 select noninverted input */

now_int_state=0;

/* now PC0=low

*/

}

/* now PC0=High

*/

else now_int_state=1;

}

/* now PC0 change to high

*/

else

{

/* INT_CHAN_0 = PC0

*/

if ((inportb(wBase+7)&1)==1)

/* PC0 still fixed in high

*/

{

/* need to generate a high pulse */

outportb(wBase+0x2a,0);

/* INV0 select inverted input

*/

now_int_state=1;

/* now PC0=high

*/

}

/* now PC0=low

*/

else now_int_state=0;

}

 

 

if (wIrq>=8) outportb(A2_8259,0x20); outportb(A1_8259,0x20);

}

OME-PIO-D56/PIO-D24 User Manual (Ver.2.1, Oct/2003, PPH-005-21)

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Contents User’sGuide Canada MexicoBenelux Czech RepublicOME-PIO-D56/D24 Table of Contents Features IntroductionSpecifications Order DescriptionOptions Product Checklist PCI Data Acquisition FamilyOME-PISO-series cost-effective generation, isolated cards Hardware configuration Board LayoutI/O Port Location Enabling I/O Operation1 DI/DO Port Architecture CON3 Select Sec RESET\ Sec DI Port Architecture CON2 Do Port Architecture CON1 If INT signal is Low now Æ select the non-inverted input Interrupt OperationMake sure the initial level is High or Low Interrupt Block Diagram of OME-PIO D56/D24 Interrupt output signal of OME-PIO-D56/OME-PIO-D24, INT\ isINTCHAN0/1/2/3 Initialhigh, activelow Interrupt source COUNTL++Initiallow, activehigh Interrupt source Muliti-Interrupt Source PC0 PC1 PC2 PC3Read all interrupt state Daughter Boards OME-DB-37OME-DN-37 OME-DB-8125OME-ADP-20/PCI OME-DB-24PD Isolated Input Board OME-DB-24RD Relay Board OME-DB-24PRD, OME-DB-24POR, OME DB-24C Daughter Board Comparison Table All signals are TTL compatible Pin AssignmentDI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 How to Find the I/O Address Resource-allocated informationPIO/PISO identification information PC’s physical slot informationPIODriverInit PIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAuxWSubVendor=0x80 wSubDevice=1 wSubAux=0x40 For D56/D24Printf\nThrer are %d Piopiso Cards in this PC,wBoards OME-PISO-P32C32 PIOGetConfigAddressSpace Enable all D/I/O operations of card0Enable all D/I/O operations of card1 ShowPIOPISO ShowPIOPISOwSubVendor,wSubDevice,wSubAuxAssignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07I/O Address Map Address Read WriteRESET\ Control Register AUX Control RegisterAUX data Register INT Mask Control Register Aux Status RegisterInterrupt Polarity Control Register 7 I/O Selection Control RegisterRead/Write 8-bit data Register How to install software & utility? Demo programPiopiso PIOPISO.EXE for Windows DEMO1 DEMO2 DEMO3 COUNT=0COUNT++ DEMO4 COUNT++ DEMO5 PC3CNTL1=CNTL2=CNTL3=CNTL4=0 Page WARRANTY/DISCLAIMER Temperature