Cypress CY7C1346H manual ZZ Mode Timing 21, DON’T Care

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CY7C1346H

Switching Waveforms (continued)

ZZMode Timing [21, 22]

CLK

t ZZ

ZZ

t ZZI

ISUPPLY

I DDZZ

ALL INPUTS (except ZZ)

Outputs (Q)

High-Z

DON’T CARE

t ZZREC

t RZZI

DESELECT or READ Only

Notes:

21.Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.

22.DQs are in High-Z when exiting ZZ sleep mode.

Document #: 38-05672 Rev. *B

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram CY7C1346H Pin ConfigurationSelection Guide 166 MHz UnitName Description Power supply inputs to the core of the devicePin Definitions Byte Write Select Inputs, active LOW . Qualified withFunctional Overview ZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Burst SequencesNext Cycle Add. Used Adsp Adsc ADV Write CLKTruth Table for Read/Write2 FunctionAmbient Range Maximum RatingsOperating Range AC Test Loads and Waveforms Capacitance10Thermal Resistance10 Switching Characteristics Over the Operating Range 11 Switching Waveforms Read Cycle Timing17Write Cycle Timing17 ADVRead/Write Cycle Timing17, 19 CLZZZ Mode Timing 21 DON’T CarePin Tqfp 14 x 20 x 1.4 mm Package DiagramsOrdering Information PCI Issue Date Orig. Description of ChangeDocument History RXU