Cypress CY8C24223, CY8C24123 Pin Part Pinout MLF Type Description Digital Analog Name, Extclk

Page 10

CY8C24123 CY8C24223, CY8C24423

32-Pin Part Pinout

Table 6. 32-Pin Part Pinout (MLF*)

Pin

Type

Pin

Description

No.

Digital

Analog

Name

 

1

IO

 

P2[7]

 

2

IO

 

P2[5]

 

3

IO

I

P2[3]

Direct switched capacitor block input

4

IO

I

P2[1]

Direct switched capacitor block input

5

Power

Vss

Ground connection

6

Power

SMP

Switch Mode Pump (SMP)

 

 

 

 

connection to external components

 

 

 

 

required

7

IO

 

P1[7]

I2C Serial Clock (SCL)

8

IO

 

P1[5]

I2C Serial Data (SDA)

9

 

 

NC

No connection. Do not use.

10

IO

 

P1[3]

 

11

IO

 

P1[1]

Crystal Input (XTALin), I2C Serial

 

 

 

 

Clock (SCL)

12

Power

Vss

Ground connection

13

IO

 

P1[0]

Crystal Output (XTALout), I2C Serial

 

 

 

 

Data (SDA)

14

IO

 

P1[2]

 

15

IO

 

P1[4]

Optional External Clock Input

 

 

 

 

(EXTCLK)

16

 

 

NC

No connection. Do not use.

17

IO

 

P1[6]

 

18

Input

XRES

Active high external reset with

 

 

 

 

internal pull down

19

IO

I

P2[0]

Direct switched capacitor block input

20

IO

I

P2[2]

Direct switched capacitor block input

21

IO

 

P2[4]

External Analog Ground (AGND)

22

IO

 

P2[6]

External Voltage Reference (VRef)

23

IO

I

P0[0]

Analog column mux input

24

IO

I

P0[2]

Analog column mux input

25

 

 

NC

No connection. Do not use.

26

IO

I

P0[4]

Analog column mux input

27

IO

I

P0[6]

Analog column mux input

28

Power

Vdd

Supply voltage

29

IO

I

P0[7]

Analog column mux input

30

IO

IO

P0[5]

Analog column mux input and

 

 

 

 

column output

31

IO

IO

P0[3]

Analog column mux input and

 

 

 

 

column output

32

IO

I

P0[1]

Analog column mux input

LEGEND: A = Analog, I = Input, and O = Output.

*The MLF package has a center pad that must be connected to the same ground as the Vss pin.

Figure 9. CY8C24423 32-Pin PSoC Device

 

 

 

P0[1], AI

P0[3], AIO

P0[5], AIO

P0[7], AI

Vdd

P0[6], AI

P0[4], AI

NC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P2[7]

 

1

32

31

30

29

28

27

26

25

 

P0[2], AI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P2[5]

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

 

P0[0], AI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AI, P2[3]

 

3

 

 

 

 

 

 

MLF

 

 

22

 

P2[6], External VRef

 

 

 

 

 

 

 

 

 

 

AI, P2[1]

 

4

 

 

 

 

 

 

 

 

21

 

P2[4], External AGND

 

 

 

 

 

 

 

 

 

 

Vss

 

5

 

 

 

 

(Top View)

20

 

P2[2], AI

 

 

 

 

 

 

SMP

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

 

P2[0], AI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I2C SCL, P1[7]

 

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

 

XRES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I2C SDA, P1[5]

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

17

 

P1[6]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

10 11

 

12

13

14

15

 

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

P1[3]

P1[1]

Vss

P1[0]

P1[2]

P1[4]

NC

 

 

 

 

 

 

 

 

 

I2C SCL, XTALin,

 

 

I2C SDA, XTALout,

 

 

EXTCLK,

 

 

 

 

Document Number: 38-12011 Rev. *G

Page 10 of 43

[+] Feedback

Image 10
Contents Logic Block Diagram FeaturesCypress Semiconductor Corporation 198 Champion Court PSoC Core PSoC Functional OverviewDigital System Analog System Block Diagram Analog SystemGetting Started PSoC Device CharacteristicsAdditional System Resources Device Editor Development ToolsPSoC Designer Software Subsystems Design BrowserDebugger User Modules and the PSoC Development ProcessHardware Tools Online Help SystemDocument Conventions Pinouts Pin Part PinoutExternal components required Switch Mode Pump SMP connection toActive high external reset with internal SCLPin Part Pinout MLF Type Description Digital Analog Name ExtclkRegister Mapping Tables Register ReferenceRegister Conventions Abbreviations UsedName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessCY8C24123 CY8C24223, CY8C24423 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Symbol Description Min Typ Max Units Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC Gpio Specifications Symbol Description Min Typ Max Units DC General Purpose IO SpecificationsDC Operational Amplifier Specifications Psrr OA Power = High High power, high opamp Input Capacitance Port 0 Analog Pins Package and pinPower = Low At high power. For all Power = Medium Vdd Power = Low Power = Medium Power = High is 5V onlyDC Analog Output Buffer Specifications Psrr OBBAT3V DC Switch Mode Pump SpecificationsBAT5V PSoCTMVdd/2 + BG + DC Analog Reference SpecificationsVdd/2 BG + CT Block Power = High Agnd = P24 P24 = Vdd/2 Agnd = Vdd/2 a CT Block Power = HighBandgap Voltage Reference DC Analog PSoC Block Specifications DC POR and LVD SpecificationsDC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsDC24M Gain EnablePLL 32K SelectAC Gpio Specifications Symbol Description Min Typ Max Units AC General Purpose IO SpecificationsPin BW OA AC Operational Amplifier SpecificationsSpecification minimums for NV/rt-Hz Document Number 38-12011 Rev. *GMHz High Opamp Bias not supported Spim AC Digital Block SpecificationsCrcprs SpisLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC Analog Output Buffer SpecificationsBW OB AC External Clock Specifications AC Programming SpecificationsAC I2C Specifications Packaging Information Pin 300-Mil PdipPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Thermal Impedances Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal Impedances per PackageOrdering Information Ordering Code DefinitionsDocument History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Orig. Submission Description of Change Date

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.