Cypress CY8C24123, CY8C24223 manual Bandgap Voltage Reference, Agnd = Vdd/2 a CT Block Power = High

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CY8C24123

CY8C24223, CY8C24423

Table 21. 3.3V DC Analog Reference Specifications

Symbol

Description

Min

Typ

 

Max

Units

BG

Bandgap Voltage Reference

1.274

1.30

 

1.326

V

–

AGND = Vdd/2a

 

 

 

 

 

 

CT Block Power = High

Vdd/2 - 0.037

Vdd/2 - 0.020

 

Vdd/2 + 0.002

V

–

AGND = 2 x BandGapa

 

Not Allowed

 

 

 

 

CT Block Power = High

 

 

 

 

 

–

AGND = P2[4] (P2[4] = Vdd/2)

 

 

 

 

 

 

CT Block Power = High

P2[4] - 0.008

P2[4] + 0.001

 

P2[4] + 0.009

V

–

AGND = BandGapa

 

 

 

 

 

 

CT Block Power = High

BG - 0.009

BG + 0.005

 

BG + 0.015

V

–

AGND = 1.6 x BandGapa

 

 

 

 

 

 

CT Block Power = High

1.6 x BG - 0.027

1.6 x BG - 0.010

 

1.6 x BG + 0.018

V

–

AGND Column to Column Variation (AGND = Vdd/2)a

 

 

 

 

 

 

CT Block Power = High

-0.034

0.000

 

0.034

mV

–

RefHi = Vdd/2 + BandGap

 

Not Allowed

 

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefHi = 3 x BandGap

 

Not Allowed

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefHi = 2 x BandGap + P2[6] (P2[6] = 0.5V)

 

Not Allowed

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefHi = P2[4] + BandGap (P2[4] = Vdd/2)

 

Not Allowed

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6] = 0.5V)

P2[4] + P2[6] -

P2[4] + P2[6] -

 

P2[4] + P2[6] +

V

 

Ref Control Power = High

 

 

 

0.075

0.009

 

0.057

 

–

RefHi = 3.2 x BandGap

 

Not Allowed

 

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefLo = Vdd/2 - BandGap

 

Not Allowed

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefLo = BandGap

 

Not Allowed

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefLo = 2 x BandGap - P2[6] (P2[6] = 0.5V)

 

Not Allowed

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefLo = P2[4] – BandGap (P2[4] = Vdd/2)

 

Not Allowed

 

 

 

Ref Control Power = High

 

 

 

 

 

–

RefLo = P2[4]-P2[6] (P2[4] = Vdd/2, P2[6] = 0.5V)

P2[4] - P2[6] -

P2[4]- P2[6] +

 

P2[4] - P2[6] +

V

 

Ref Control Power = High

 

 

 

0.048

0.022

 

0.092

 

a. AGND tolerance includes the offsets of the local buffer in the PSoC block. Bandgap voltage is 1.3V ± 2%

Document Number: 38-12011 Rev. *G

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Contents Features Logic Block DiagramCypress Semiconductor Corporation 198 Champion Court PSoC Functional Overview PSoC CoreDigital System Analog System Block Diagram Analog SystemPSoC Device Characteristics Getting StartedAdditional System Resources Development Tools PSoC Designer Software SubsystemsDevice Editor Design BrowserUser Modules and the PSoC Development Process Hardware ToolsDebugger Online Help SystemDocument Conventions Pinouts Pin Part PinoutSwitch Mode Pump SMP connection to Active high external reset with internalExternal components required SCLPin Part Pinout MLF Type Description Digital Analog Name ExtclkRegister Reference Register ConventionsRegister Mapping Tables Abbreviations UsedName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessCY8C24123 CY8C24223, CY8C24423 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Absolute Maximum Ratings Symbol Description Min Typ UnitsOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC General Purpose IO Specifications DC Gpio Specifications Symbol Description Min Typ Max UnitsDC Operational Amplifier Specifications Psrr OA Input Capacitance Port 0 Analog Pins Package and pin Power = Low At high power. For all Power = MediumPower = High High power, high opamp Vdd Power = Low Power = Medium Power = High is 5V onlyDC Analog Output Buffer Specifications Psrr OBDC Switch Mode Pump Specifications BAT5VBAT3V PSoCTMDC Analog Reference Specifications Vdd/2 + BG +Vdd/2 BG + Agnd = Vdd/2 a CT Block Power = High CT Block Power = High Agnd = P24 P24 = Vdd/2Bandgap Voltage Reference DC Analog PSoC Block Specifications DC POR and LVD SpecificationsDC Programming Specifications AC Electrical Characteristics AC Chip-Level SpecificationsDC24M Enable PLLGain 32K SelectAC General Purpose IO Specifications AC Gpio Specifications Symbol Description Min Typ Max UnitsPin AC Operational Amplifier Specifications Specification minimums forBW OA NV/rt-Hz Document Number 38-12011 Rev. *GMHz High Opamp Bias not supported AC Digital Block Specifications CrcprsSpim SpisAC Analog Output Buffer Specifications Large Signal Bandwidth, 1V pp, 3dB BW, 100 pF LoadBW OB AC External Clock Specifications AC Programming SpecificationsAC I2C Specifications Packaging Information Pin 300-Mil PdipPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Capacitance on Crystal Pins Typical Package Capacitance on Crystal PinsThermal Impedances Thermal Impedances per PackageOrdering Information Ordering Code DefinitionsSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History Orig. Submission Description of Change Date

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.
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