Cypress CY8C24423, CY8C24123, CY8C24223 manual DC Programming Specifications

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CY8C24123

CY8C24223, CY8C24423

DC Programming Specifications

The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only or unless otherwise specified.

Table 24. DC Programming Specifications

Symbol

Description

Min

Typ

Max

Units

Notes

IDDP

Supply Current During Programming or Verify

–

5

25

mA

 

VILP

Input Low Voltage During Programming or

–

–

0.8

V

 

 

Verify

 

 

 

 

 

VIHP

Input High Voltage During Programming or

2.2

–

–

V

 

 

Verify

 

 

 

 

 

IILP

Input Current when Applying Vilp to P1[0] or

–

–

0.2

mA

Driving internal pull down

 

P1[1] During Programming or Verify

 

 

 

 

resistor.

IIHP

Input Current when Applying Vihp to P1[0] or

–

–

1.5

mA

Driving internal pull down

 

P1[1] During Programming or Verify

 

 

 

 

resistor.

VOLV

Output Low Voltage During Programming or

–

–

Vss + 0.75

V

 

 

Verify

 

 

 

 

 

VOHV

Output High Voltage During Programming or

Vdd - 1.0

–

Vdd

V

 

 

Verify

 

 

 

 

 

FlashENPB

Flash Endurance (per block)

50,000

–

–

–

Erase/write cycles per block.

FlashENT

Flash Endurance (total)a

1,800,000

–

–

–

Erase/write cycles.

FlashDR

Flash Data Retention

10

–

–

Years

 

a.A maximum of 36 x 50,000 block endurance cycles is allowed. This may be balanced between operations on 36x1 blocks of 50,000 maximum cycles each, 36x2 blocks of 25,000 maximum cycles each, or 36x4 blocks of 12,500 maximum cycles each (and so forth to limit the total number of cycles to 36x50,000 and that no single block ever sees more than 50,000 cycles).

For the full industrial range, the user must employ a temperature sensor user module (FlashTemp) and feed the result to the temperature argument before writing. Refer to the Flash APIs Application Note AN2015 at http://www.cypress.com under Application Notes for more information.

Document Number: 38-12011 Rev. *G

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Block Diagram Analog SystemAdditional System Resources PSoC Device CharacteristicsGetting Started Device Editor Development ToolsPSoC Designer Software Subsystems Design BrowserDebugger User Modules and the PSoC Development ProcessHardware Tools Online Help SystemDocument Conventions Pinouts Pin Part PinoutExternal components required Switch Mode Pump SMP connection toActive high external reset with internal SCLPin Part Pinout MLF Type Description Digital Analog Name ExtclkRegister Mapping Tables Register ReferenceRegister Conventions Abbreviations UsedName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessCY8C24123 CY8C24223, CY8C24423 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Symbol Description Min Typ Max Units Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC Operational Amplifier Specifications DC General Purpose IO SpecificationsDC Gpio Specifications Symbol Description Min Typ Max Units Psrr OA Power = High High power, high opamp Input Capacitance Port 0 Analog Pins Package and pinPower = Low At high power. For all Power = Medium Vdd Power = Low Power = Medium Power = High is 5V onlyDC Analog Output Buffer Specifications Psrr OBBAT3V DC Switch Mode Pump SpecificationsBAT5V PSoCTMVdd/2 BG + DC Analog Reference SpecificationsVdd/2 + BG + Bandgap Voltage Reference Agnd = Vdd/2 a CT Block Power = HighCT Block Power = High Agnd = P24 P24 = Vdd/2 DC Analog PSoC Block Specifications DC POR and LVD SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications Gain EnablePLL 32K SelectPin AC General Purpose IO SpecificationsAC Gpio Specifications Symbol Description Min Typ Max Units BW OA AC Operational Amplifier SpecificationsSpecification minimums for NV/rt-Hz Document Number 38-12011 Rev. *GMHz High Opamp Bias not supported Spim AC Digital Block SpecificationsCrcprs SpisBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC External Clock Specifications AC Programming SpecificationsAC I2C Specifications Packaging Information Pin 300-Mil PdipPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Thermal Impedances Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal Impedances per PackageOrdering Information Ordering Code DefinitionsDocument History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Orig. Submission Description of Change Date

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.
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