Cypress CY8C24423, CY8C24123, CY8C24223 manual Pinouts, Pin Part Pinout

Page 8

CY8C24123

CY8C24223, CY8C24423

Pinouts

The CY8C24x23 PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port pin (labeled with a “P”) is capable of Digital IO. However, Vss, Vdd, SMP, and XRES are not capable of Digital IO.

8-Pin Part Pinout

Table 3. 8-Pin Part Pinout (PDIP, SOIC)

Pin

Type

Pin

Description

Figure 6. CY8C24123 8-Pin PSoC Device

No.

Digital

Analog

Name

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AIO, P0[5]

 

1

8

 

Vdd

1

IO

IO

P0[5]

Analog column mux input and column output

 

 

 

 

 

 

 

 

 

AIO, P0[3]

 

2PDIP7

 

P0[4], AI

 

 

 

 

 

 

 

2

IO

IO

P0[3]

Analog column mux input and column output

I2C SCL, XTALin, P1[1]

 

3SOIC6

 

P0[2], AI

 

 

3

IO

 

P1[1]

Crystal Input (XTALin), I2C Serial Clock (SCL)

Vss

 

4

5

 

P1[0], XTALout, I2C SDA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

Power

Vss

Ground connection

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

IO

 

P1[0]

Crystal Output (XTALout), I2C Serial Data (SDA)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

IO

I

P0[2]

Analog column mux input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

IO

I

P0[4]

Analog column mux input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

Power

Vdd

Supply voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LEGEND: A = Analog, I = Input, and O = Output.

20-Pin Part Pinout

Table 4. 20-Pin Part Pinout (PDIP, SSOP, SOIC)

Pin

Type

Pin

Description

Figure 7. CY8C24223 20-Pin PSoC Device

No.

Digital

Analog

Name

 

 

 

 

 

 

 

 

 

AI, P0[7]

 

1

 

 

20

 

Vdd

1

IO

I

P0[7]

Analog column mux input

 

 

 

 

AIO, P0[5]

 

2

 

 

19

 

P0[6], AI

 

 

 

 

2

IO

IO

P0[5]

Analog column mux input and column output

AIO, P0[3]

 

3

 

PDIP

18

 

P0[4], AI

 

 

 

 

 

 

 

 

AI, P0[1]

 

4

 

17

 

P0[2], AI

3

IO

IO

P0[3]

Analog column mux input and column output

 

 

SMP

 

5

SSOP

16

 

P0[0], AI

 

 

4

IO

I

P0[1]

Analog column mux input

I2C SCL, P1[7]

 

6

SOIC

15

 

XRES

 

 

I2C SDA, P1[5]

 

7

14

 

P1[6]

5

Power

SMP

Switch Mode Pump (SMP) connection to external

P1[3]

 

8

 

 

13

 

P1[4], EXTCLK

 

 

 

 

 

 

 

 

components required

I2C SCL, XTALin, P1[1]

 

9

 

 

12

 

P1[2]

 

 

 

 

 

 

 

 

 

 

 

 

 

Vss

 

10

 

 

11

 

P1[0], XTALout, I2C SDA

6

IO

 

P1[7]

I2C Serial Clock (SCL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

IO

 

P1[5]

I2C Serial Data (SDA)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

IO

 

P1[3]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

IO

 

P1[1]

Crystal Input (XTALin), I2C Serial Clock (SCL)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

Power

Vss

Ground connection

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

IO

 

P1[0]

Crystal Output (XTALout), I2C Serial Data (SDA)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

IO

 

P1[2]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

IO

 

P1[4]

Optional External Clock Input (EXTCLK)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

IO

 

P1[6]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

Input

XRES

Active high external reset with internal pull down

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16

IO

I

P0[0]

Analog column mux input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

17

IO

I

P0[2]

Analog column mux input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

IO

I

P0[4]

Analog column mux input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

IO

I

P0[6]

Analog column mux input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20

Power

Vdd

Supply voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LEGEND: A = Analog, I = Input, and O = Output.

Document Number: 38-12011 Rev. *G

Page 8 of 43

[+] Feedback

Image 8
Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Block Diagram Analog SystemAdditional System Resources PSoC Device CharacteristicsGetting Started Development Tools PSoC Designer Software SubsystemsDevice Editor Design BrowserUser Modules and the PSoC Development Process Hardware ToolsDebugger Online Help SystemDocument Conventions Pinouts Pin Part PinoutSwitch Mode Pump SMP connection to Active high external reset with internalExternal components required SCLPin Part Pinout MLF Type Description Digital Analog Name ExtclkRegister Reference Register ConventionsRegister Mapping Tables Abbreviations UsedName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessCY8C24123 CY8C24223, CY8C24423 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Absolute Maximum Ratings Symbol Description Min Typ UnitsOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC Operational Amplifier Specifications DC General Purpose IO SpecificationsDC Gpio Specifications Symbol Description Min Typ Max Units Psrr OA Input Capacitance Port 0 Analog Pins Package and pin Power = Low At high power. For all Power = MediumPower = High High power, high opamp Vdd Power = Low Power = Medium Power = High is 5V onlyDC Analog Output Buffer Specifications Psrr OBDC Switch Mode Pump Specifications BAT5VBAT3V PSoCTMVdd/2 BG + DC Analog Reference SpecificationsVdd/2 + BG + Bandgap Voltage Reference Agnd = Vdd/2 a CT Block Power = HighCT Block Power = High Agnd = P24 P24 = Vdd/2 DC Analog PSoC Block Specifications DC POR and LVD SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications Enable PLLGain 32K SelectPin AC General Purpose IO SpecificationsAC Gpio Specifications Symbol Description Min Typ Max Units AC Operational Amplifier Specifications Specification minimums forBW OA NV/rt-Hz Document Number 38-12011 Rev. *GMHz High Opamp Bias not supported AC Digital Block Specifications CrcprsSpim SpisBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC External Clock Specifications AC Programming SpecificationsAC I2C Specifications Packaging Information Pin 300-Mil PdipPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Capacitance on Crystal Pins Typical Package Capacitance on Crystal PinsThermal Impedances Thermal Impedances per PackageOrdering Information Ordering Code DefinitionsSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History Orig. Submission Description of Change Date

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.