Cypress manual CY8C24123 CY8C24223, CY8C24423

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CY8C24123

CY8C24223, CY8C24423

Table 9. Register Map Bank 1 Table: Configuration Space (continued)

Name	Addr (1,Hex)	Access	Name	Addr (1,Hex)	Access	Name	Addr (1,Hex)	Access	Name	Addr (1,Hex)	Access
	17			57		ASC21CR3	97	RW		D7

	18			58			98			D8

	19			59			99			D9

	1A			5A			9A			DA

	1B			5B			9B			DB

	1C			5C			9C			DC

	1D			5D			9D		OSC_GO_EN	DD	RW

	1E			5E			9E		OSC_CR4	DE	RW

	1F			5F			9F		OSC_CR3	DF	RW

DBB00FN	20	RW	CLK_CR0	60	RW		A0		OSC_CR0	E0	RW

DBB00IN	21	RW	CLK_CR1	61	RW		A1		OSC_CR1	E1	RW

DBB00OU	22	RW	ABF_CR0	62	RW		A2		OSC_CR2	E2	RW

	23		AMD_CR0	63	RW		A3		VLT_CR	E3	RW

DBB01FN	24	RW		64			A4		VLT_CMP	E4	R

DBB01IN	25	RW		65			A5			E5

DBB01OU	26	RW	AMD_CR1	66	RW		A6			E6

	27		ALT_CR0	67	RW		A7			E7

DCB02FN	28	RW		68			A8		IMO_TR	E8	W

DCB02IN	29	RW		69			A9		ILO_TR	E9	W

DCB02OU	2A	RW		6A			AA		BDG_TR	EA	RW

	2B			6B			AB		ECO_TR	EB	W

DCB03FN	2C	RW		6C			AC			EC

DCB03IN	2D	RW		6D			AD			ED

DCB03OU	2E	RW		6E			AE			EE

	2F			6F			AF			EF

	30		ACB00CR3	70	RW	RDI0RI	B0	RW		F0

	31		ACB00CR0	71	RW	RDI0SYN	B1	RW		F1

	32		ACB00CR1	72	RW	RDI0IS	B2	RW		F2

	33		ACB00CR2	73	RW	RDI0LT0	B3	RW		F3

	34		ACB01CR3	74	RW	RDIOLT1	B4	RW		F4

	35		ACB01CR0	75	RW	RDI0RO0	B5	RW		F5

	36		ACB01CR1	76	RW	RDI0RO1	B6	RW		F6

	37		ACB01CR2	77	RW		B7		CPU_F	F7	RL

	38			78			B8			F8

	39			79			B9			F9

	3A			7A			BA			FA

	3B			7B			BB			FB

	3C			7C			BC			FC

	3D			7D			BD			FD

	3E			7E			BE		CPU_SCR1	FE	#

	3F			7F			BF		CPU_SCR0	FF	#

Blank fields are Reserved and must not be accessed.						# Access is bit specific.

Document Number: 38-12011 Rev. *G

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Block Diagram Analog SystemAdditional System Resources PSoC Device CharacteristicsGetting Started Device Editor Development ToolsPSoC Designer Software Subsystems Design BrowserDebugger User Modules and the PSoC Development ProcessHardware Tools Online Help SystemDocument Conventions Pinouts Pin Part PinoutExternal components required Switch Mode Pump SMP connection toActive high external reset with internal SCLPin Part Pinout MLF Type Description Digital Analog Name ExtclkRegister Mapping Tables Register ReferenceRegister Conventions Abbreviations UsedName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessCY8C24123 CY8C24223, CY8C24423 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Symbol Description Min Typ Max Units Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC Operational Amplifier Specifications DC General Purpose IO SpecificationsDC Gpio Specifications Symbol Description Min Typ Max Units Psrr OA Power = High High power, high opamp Input Capacitance Port 0 Analog Pins Package and pinPower = Low At high power. For all Power = Medium Vdd Power = Low Power = Medium Power = High is 5V onlyDC Analog Output Buffer Specifications Psrr OBBAT3V DC Switch Mode Pump SpecificationsBAT5V PSoCTMVdd/2 BG + DC Analog Reference SpecificationsVdd/2 + BG + Bandgap Voltage Reference Agnd = Vdd/2 a CT Block Power = HighCT Block Power = High Agnd = P24 P24 = Vdd/2 DC Analog PSoC Block Specifications DC POR and LVD SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications Gain EnablePLL 32K SelectPin AC General Purpose IO SpecificationsAC Gpio Specifications Symbol Description Min Typ Max Units BW OA AC Operational Amplifier SpecificationsSpecification minimums for NV/rt-Hz Document Number 38-12011 Rev. *GMHz High Opamp Bias not supported Spim AC Digital Block SpecificationsCrcprs SpisBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC External Clock Specifications AC Programming SpecificationsAC I2C Specifications Packaging Information Pin 300-Mil PdipPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Thermal Impedances Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal Impedances per PackageOrdering Information Ordering Code DefinitionsDocument History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Orig. Submission Description of Change Date

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.