Cypress CY8C24423, CY8C24123 manual DC Analog Reference Specifications, Vdd/2 + BG +, Vdd/2 BG +

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CY8C24123

CY8C24223, CY8C24423

DC Analog Reference Specifications

The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only or unless otherwise specified.

The guaranteed specifications are measured through the Analog Continuous Time PSoC blocks. The power levels for AGND refer to the power of the Analog Continuous Time PSoC block. The power levels for RefHi and RefLo refer to the Analog Reference Control register. The limits stated for AGND include the offset error of the AGND buffer local to the Analog Continuous Time PSoC block.

Note Avoid using P2[4] for digital signaling when using an analog resource that depends on the Analog Reference. Some coupling of the digital signal may appear on the AGND.

Table 20. 5V DC Analog Reference Specifications

Symbol

Description

Min

Typ

Max

Units

BG

Bandgap Voltage Reference

1.274

1.30

1.326

V

 

 

 

 

 

 

–

AGND = Vdd/2a

 

 

 

 

 

CT Block Power = High

Vdd/2 - 0.043

Vdd/2 - 0.025

Vdd/2 + 0.003

V

–

AGND = 2 x BandGapa

 

 

 

 

 

CT Block Power = High

2 x BG - 0.048

2 x BG - 0.030

2 x BG + 0.024

V

–AGND = P2[4] (P2[4] = Vdd/2)a

 

CT Block Power = High

P2[4] - 0.013

P2[4]

P2[4] + 0.014

V

–

AGND = BandGapa

 

 

 

 

 

CT Block Power = High

BG - 0.009

BG + 0.008

BG + 0.016

V

–AGND = 1.6 x BandGapa

 

CT Block Power = High

1.6 x BG - 0.022

1.6 x BG - 0.010

1.6 x BG + 0.018

V

–

AGND Column to Column Variation (AGND =

 

 

 

 

 

Vdd/2)a

-0.034

0.000

0.034

V

 

CT Block Power = High

 

 

 

 

–RefHi = Vdd/2 + BandGap

 

Ref Control Power = High

Vdd/2 + BG - 0.140

Vdd/2 + BG - 0.018

Vdd/2 + BG +

V

 

 

 

 

0.103

 

–

RefHi = 3 x BandGap

3 x BG - 0.112

3 x BG - 0.018

3 x BG + 0.076

V

 

Ref Control Power = High

–RefHi = 2 x BandGap + P2[6] (P2[6] = 1.3V)

Ref Control Power = High

2 x BG + P2[6] -

2 x BG + P2[6] -

2 x BG + P2[6] + V

 

0.113

0.018

0.077

–RefHi = P2[4] + BandGap (P2[4] = Vdd/2)

Ref Control Power = High

P2[4] + BG - 0.130 P2[4] + BG - 0.016 P2[4] + BG + 0.098 V

–RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6] = 1.3V)

 

Ref Control Power = High

P2[4] + P2[6] - 0.133

P2[4] + P2[6] -

P2[4] + P2[6]+

V

 

 

 

0.016

0.100

 

–

RefHi = 3.2 x BandGap

3.2 x BG - 0.112

3.2 x BG

3.2 x BG + 0.076

V

 

Ref Control Power = High

–RefLo = Vdd/2 – BandGap

 

Ref Control Power = High

Vdd/2 - BG - 0.051

Vdd/2 - BG + 0.024

Vdd/2 - BG + 0.098

V

–

RefLo = BandGap

BG - 0.082

BG + 0.023

BG + 0.129

V

 

Ref Control Power = High

–RefLo = 2 x BandGap - P2[6] (P2[6] = 1.3V)

Ref Control Power = High

2 x BG - P2[6] -

2 x BG - P2[6] +

2 x BG - P2[6] +

V

 

0.084

0.025

0.134

 

–RefLo = P2[4] – BandGap (P2[4] = Vdd/2)

Ref Control Power = High

P2[4] - BG - 0.056 P2[4] - BG + 0.026 P2[4] - BG + 0.107 V

–RefLo = P2[4]-P2[6] (P2[4] = Vdd/2, P2[6] = 1.3V)

Ref Control Power = High

P2[4] - P2[6] - 0.057 P2[4] - P2[6] +

P2[4] - P2[6] +

V

 

0.026

0.110

 

 

a. AGND tolerance includes the offsets of the local buffer in the PSoC block. Bandgap voltage is 1.3V ± 2%.

 

 

 

Document Number: 38-12011 Rev. *G

 

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Analog System Block DiagramAdditional System Resources PSoC Device CharacteristicsGetting Started Design Browser Development ToolsPSoC Designer Software Subsystems Device EditorOnline Help System User Modules and the PSoC Development ProcessHardware Tools DebuggerDocument Conventions Pin Part Pinout PinoutsSCL Switch Mode Pump SMP connection toActive high external reset with internal External components requiredExtclk Pin Part Pinout MLF Type Description Digital Analog NameAbbreviations Used Register ReferenceRegister Conventions Register Mapping TablesRegister Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr 1,Hex Access Register Map Bank 1 Table Configuration SpaceCY8C24123 CY8C24223, CY8C24423 Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Operating Temperature Symbol Description Min Typ Max UnitsDC Chip-Level Specifications DC Electrical CharacteristicsDC Operational Amplifier Specifications DC General Purpose IO SpecificationsDC Gpio Specifications Symbol Description Min Typ Max Units Psrr OA Vdd Power = Low Power = Medium Power = High is 5V only Input Capacitance Port 0 Analog Pins Package and pinPower = Low At high power. For all Power = Medium Power = High High power, high opampPsrr OB DC Analog Output Buffer SpecificationsPSoCTM DC Switch Mode Pump SpecificationsBAT5V BAT3VVdd/2 BG + DC Analog Reference SpecificationsVdd/2 + BG + Bandgap Voltage Reference Agnd = Vdd/2 a CT Block Power = HighCT Block Power = High Agnd = P24 P24 = Vdd/2 DC POR and LVD Specifications DC Analog PSoC Block SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications 32K Select EnablePLL GainPin AC General Purpose IO SpecificationsAC Gpio Specifications Symbol Description Min Typ Max Units NV/rt-Hz Document Number 38-12011 Rev. *G AC Operational Amplifier SpecificationsSpecification minimums for BW OAMHz High Opamp Bias not supported Spis AC Digital Block SpecificationsCrcprs SpimBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC Programming Specifications AC External Clock SpecificationsAC I2C Specifications Pin 300-Mil Pdip Packaging InformationPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Thermal Impedances per Package Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal ImpedancesOrdering Code Definitions Ordering InformationOrig. Submission Description of Change Date Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Document History

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.
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