Cypress CY8C24223, CY8C24123, CY8C24423 manual Document Conventions

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CY8C24123 CY8C24223, CY8C24423

Figure 5. User Module and Source Code Development Flows

 

 

Device Editor

 

 

 

 

 

 

 

 

 

 

 

 

User

 

 

Placement

 

 

Source

 

 

 

 

and

 

 

 

 

Module

 

 

 

 

Code

 

 

 

 

Parameter

 

 

 

 

Selection

 

 

 

 

Generator

 

 

 

 

-ization

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Generate

Application

Application Editor

Project

 

Source

 

Build

 

Code

 

Manager

 

 

Manager

 

Editor

 

 

 

 

 

 

 

 

 

 

 

 

 

Build

 

 

 

All

 

 

 

 

 

 

 

 

 

 

 

Debugger

 

 

 

 

 

 

 

 

 

 

Interface

 

Storage

 

Event &

 

 

 

 

Breakpoint

 

 

to ICE

 

Inspector

 

 

 

 

 

Manager

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The next step is to write your main program, and any sub-routines using PSoC Designer’s Application Editor subsystem. The Application Editor includes a Project Manager that allows you to open the project source code files (including all generated code files) from a hierarchal view. The source code editor provides syntax coloring and advanced edit features for both C and assembly language. File search capabilities include simple string searches and recursive “grep-style” patterns. A single mouse click invokes the Build Manager. It employs a professional-strength “makefile” system to automatically analyze all file dependencies and run the compiler and assembler as necessary. Project-level options control optimization strategies used by the compiler and linker. Syntax errors are displayed in a console window. Double clicking the error message takes you directly to the offending line of source code. When all is correct, the linker builds a ROM file image suitable for programming.

The last step in the development process takes place inside the PSoC Designer’s Debugger subsystem. The Debugger downloads the ROM image to the In-Circuit Emulator (ICE) where it runs at full speed. Debugger capabilities rival those of systems costing many times more. In addition to traditional single-step, run-to-breakpoint and watch-variable features, the Debugger provides a large trace buffer and allows you define complex breakpoint events that include monitoring address and data bus values, memory locations and external signals.

Document Conventions

Acronyms Used

The following table lists the acronyms that are used in this document.

Table 2. Acronyms

Acronym

Description

AC

alternating current

 

 

ADC

analog-to-digital converter

 

 

API

application programming interface

 

 

CPU

central processing unit

 

 

CT

continuous time

 

 

DAC

digital-to-analog converter

 

 

DC

direct current

 

 

EEPROM

electrically erasable programmable read-only

 

memory

FSR

full scale range

 

 

GPIO

general purpose IO

 

 

IO

input/output

 

 

IPOR

imprecise power on reset

 

 

LSb

least-significant bit

 

 

LVD

low voltage detect

 

 

MSb

most-significant bit

 

 

PC

program counter

 

 

POR

power on reset

 

 

PPOR

precision power on reset

 

 

PSoC®

Programmable System-on-Chip

PWM

pulse width modulator

 

 

RAM

random access memory

 

 

ROM

read only memory

 

 

SC

switched capacitor

 

 

SMP

switch mode pump

 

 

Units of Measure

A units of measure table is located in the Electrical Specifications section. Table 7 on page 11 lists all the abbreviations used to measure the PSoC devices.

Numeric Naming

Hexadecimal numbers are represented with all letters in uppercase with an appended lowercase ‘h’ (for example, ‘14h’ or ‘3Ah’). Hexadecimal numbers may also be represented by a ‘0x’ prefix, the C coding convention. Binary numbers have an appended lowercase ‘b’ (for example, 01010100b’ or ‘01000011b’). Numbers not indicated by an ‘h’ or ‘b’ are decimal.

Document Number: 38-12011 Rev. *G

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Contents Logic Block Diagram FeaturesCypress Semiconductor Corporation 198 Champion Court PSoC Core PSoC Functional OverviewDigital System Analog System Analog System Block DiagramGetting Started PSoC Device CharacteristicsAdditional System Resources Design Browser Development ToolsPSoC Designer Software Subsystems Device EditorOnline Help System User Modules and the PSoC Development ProcessHardware Tools DebuggerDocument Conventions Pin Part Pinout PinoutsSCL Switch Mode Pump SMP connection toActive high external reset with internal External components requiredExtclk Pin Part Pinout MLF Type Description Digital Analog NameAbbreviations Used Register ReferenceRegister Conventions Register Mapping TablesRegister Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr 1,Hex Access Register Map Bank 1 Table Configuration SpaceCY8C24123 CY8C24223, CY8C24423 Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Operating Temperature Symbol Description Min Typ Max UnitsDC Chip-Level Specifications DC Electrical CharacteristicsDC Gpio Specifications Symbol Description Min Typ Max Units DC General Purpose IO SpecificationsDC Operational Amplifier Specifications Psrr OA Vdd Power = Low Power = Medium Power = High is 5V only Input Capacitance Port 0 Analog Pins Package and pinPower = Low At high power. For all Power = Medium Power = High High power, high opampPsrr OB DC Analog Output Buffer SpecificationsPSoCTM DC Switch Mode Pump SpecificationsBAT5V BAT3VVdd/2 + BG + DC Analog Reference SpecificationsVdd/2 BG + CT Block Power = High Agnd = P24 P24 = Vdd/2 Agnd = Vdd/2 a CT Block Power = HighBandgap Voltage Reference DC POR and LVD Specifications DC Analog PSoC Block SpecificationsDC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsDC24M 32K Select EnablePLL GainAC Gpio Specifications Symbol Description Min Typ Max Units AC General Purpose IO SpecificationsPin NV/rt-Hz Document Number 38-12011 Rev. *G AC Operational Amplifier SpecificationsSpecification minimums for BW OAMHz High Opamp Bias not supported Spis AC Digital Block SpecificationsCrcprs SpimLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC Analog Output Buffer SpecificationsBW OB AC Programming Specifications AC External Clock SpecificationsAC I2C Specifications Pin 300-Mil Pdip Packaging InformationPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Thermal Impedances per Package Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal ImpedancesOrdering Code Definitions Ordering InformationOrig. Submission Description of Change Date Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Document History

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.
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