Cypress CY8C24223, CY8C24123, CY8C24423 manual MHz High Opamp Bias not supported

Page 31

CY8C24123

CY8C24223, CY8C24423

Table 28. 3.3V AC Operational Amplifier Specifications

Symbol

Description

Min

Typ

Max

Units

Notes

TROA

Rising Settling Time from 80% of ΔV to 0.1% of ΔV

 

 

 

 

Specification maximums for

 

(10 pF load, Unity Gain)

–

–

3.92

μs

low power and high opamp

 

Power = Low

bias, medium power, and

 

Power = Low, Opamp Bias = High

–

 

 

μs

medium power and high

 

Power = Medium

–

 

 

μs

opamp bias levels are

 

Power = Medium, Opamp Bias = High

–

–

0.72

μs

between low and high power

 

Power = High (3.3 Volt High Bias Operation not

–

–

–

μs

levels.

 

supported)

–

–

–

μs

 

 

Power = High, Opamp Bias = High (3.3 Volt High

 

 

Power, High Opamp Bias not supported)

 

 

 

 

 

TSOA

Falling Settling Time from 20% of ΔV to 0.1% of ΔV

 

 

 

 

Specification maximums for

 

(10 pF load, Unity Gain)

–

–

5.41

μs

low power and high opamp

 

Power = Low

bias, medium power, and

 

Power = Low, Opamp Bias = High

–

 

 

μs

medium power and high

 

Power = Medium

–

 

 

μs

opamp bias levels are

 

Power = Medium, Opamp Bias = High

–

–

0.72

μs

between low and high power

 

Power = High (3.3 Volt High Bias Operation not

–

–

–

μs

levels.

 

supported)

–

 

 

 

 

 

Power = High, Opamp Bias = High (3.3 Volt High

–

–

μs

 

 

Power, High Opamp Bias not supported)

 

 

 

 

 

SRROA

Rising Slew Rate (20% to 80%) (10 pF load, Unity Gain)

0.31

–

 

V/μs

Specification minimums for

 

Power = Low

 

low power and high opamp

 

Power = Low, Opamp Bias = High

 

 

 

V/μs

bias, medium power, and

 

Power = Medium

 

 

 

V/μs

medium power and high

 

Power = Medium, Opamp Bias = High

2.7

–

 

V/μs

opamp bias levels are

 

Power = High (3.3 Volt High Bias Operation not

–

–

–

V/μs

between low and high power

 

supported)

 

 

 

 

levels.

 

Power = High, Opamp Bias = High (3.3 Volt High

–

–

–

V/μs

 

 

Power, High Opamp Bias not supported)

 

 

 

 

 

SRFOA

Falling Slew Rate(20% to 80%) (10 pF load, Unity Gain)

0.24

–

 

V/μs

Specification minimums for

 

Power = Low

 

low power and high opamp

 

Power = Low, Opamp Bias = High

 

 

 

V/μs

bias, medium power, and

 

Power = Medium

 

 

 

V/μs

medium power and high

 

Power = Medium, Opamp Bias = High

1.8

–

 

V/μs

opamp bias levels are

 

Power = High (3.3 Volt High Bias Operation not

–

–

–

V/μs

between low and high power

 

supported)

 

 

 

V/μs

levels.

 

Power = High, Opamp Bias = High (3.3 Volt High

–

–

–

 

 

Power, High Opamp Bias not supported)

 

 

 

 

 

BWOA

Gain Bandwidth Product

0.67

–

 

MHz

Specification minimums for

 

Power = Low

 

low power and high opamp

 

Power = Low, Opamp Bias = High

 

 

 

MHz

bias, medium power, and

 

Power = Medium

2.8

–

 

MHz

medium power and high

 

Power = Medium, Opamp Bias = High

 

MHz

opamp bias levels are

 

Power = High (3.3 Volt High Bias Operation not

–

–

–

MHz

between low and high power

 

supported)

 

 

 

 

levels.

 

Power = High, Opamp Bias = High (3.3 Volt High Power,

–

–

–

MHz

 

 

High Opamp Bias not supported)

 

 

 

 

 

ENOA

Noise at 1 kHz (Power = Medium, Opamp Bias = High)

–

200

–

nV/rt-Hz

 

Document Number: 38-12011 Rev. *G

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Contents Logic Block Diagram FeaturesCypress Semiconductor Corporation 198 Champion Court PSoC Core PSoC Functional OverviewDigital System Analog System Analog System Block DiagramGetting Started PSoC Device CharacteristicsAdditional System Resources Design Browser Development ToolsPSoC Designer Software Subsystems Device EditorOnline Help System User Modules and the PSoC Development ProcessHardware Tools DebuggerDocument Conventions Pin Part Pinout PinoutsSCL Switch Mode Pump SMP connection toActive high external reset with internal External components requiredExtclk Pin Part Pinout MLF Type Description Digital Analog NameAbbreviations Used Register ReferenceRegister Conventions Register Mapping TablesRegister Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr 1,Hex Access Register Map Bank 1 Table Configuration SpaceCY8C24123 CY8C24223, CY8C24423 Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Operating Temperature Symbol Description Min Typ Max UnitsDC Chip-Level Specifications DC Electrical CharacteristicsDC Gpio Specifications Symbol Description Min Typ Max Units DC General Purpose IO SpecificationsDC Operational Amplifier Specifications Psrr OA Vdd Power = Low Power = Medium Power = High is 5V only Input Capacitance Port 0 Analog Pins Package and pinPower = Low At high power. For all Power = Medium Power = High High power, high opampPsrr OB DC Analog Output Buffer SpecificationsPSoCTM DC Switch Mode Pump SpecificationsBAT5V BAT3VVdd/2 + BG + DC Analog Reference SpecificationsVdd/2 BG + CT Block Power = High Agnd = P24 P24 = Vdd/2 Agnd = Vdd/2 a CT Block Power = HighBandgap Voltage Reference DC POR and LVD Specifications DC Analog PSoC Block SpecificationsDC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsDC24M 32K Select EnablePLL GainAC Gpio Specifications Symbol Description Min Typ Max Units AC General Purpose IO SpecificationsPin NV/rt-Hz Document Number 38-12011 Rev. *G AC Operational Amplifier SpecificationsSpecification minimums for BW OAMHz High Opamp Bias not supported Spis AC Digital Block SpecificationsCrcprs SpimLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC Analog Output Buffer SpecificationsBW OB AC Programming Specifications AC External Clock SpecificationsAC I2C Specifications Pin 300-Mil Pdip Packaging InformationPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D 51-85079 *C Thermal Impedances per Package Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal ImpedancesOrdering Code Definitions Ordering InformationOrig. Submission Description of Change Date Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Document History

CY8C24123, CY8C24423, CY8C24223 specifications

The Cypress CY8C24223, CY8C24423, and CY8C24123 are members of the PSoC (Programmable System-on-Chip) family, which combine a microcontroller with configurable analog and digital blocks. These devices are designed for a variety of embedded applications, offering versatility and performance for developers looking to create custom solutions.

One of the standout features of the CY8C24223, CY8C24423, and CY8C24123 is their programmable analog and digital components. These include operational amplifiers, comparators, and even CapSense technology, enabling touch sensing capabilities. This flexibility allows engineers to configure the chip according to the specific needs of their application, thereby reducing the number of external components required and simplifying PCB design.

The microcontroller core in these PSoC devices is a 16-bit architecture, offering a balance between performance and power efficiency. The CY8C24223 and CY8C24423 variants include higher RAM and Flash memory options, catering to more demanding applications compared to the CY8C24123. This makes them suitable for tasks ranging from simple control operations to more complex computational processes.

A key technology utilized in these devices is the integrated programmable interconnect, which allows for easy communication between the various configurable blocks. This feature significantly speeds up the development process by enabling designers to create custom peripheral setups without the need for extensive coding.

In addition to their hardware features, Cypress provides an intuitive design environment called PSoC Creator. This IDE simplifies the process of configuring the device, allowing developers to drag and drop components into a design schematic and generate code effortlessly. PSoC Creator also includes simulation features, enabling testing and validation of designs before deployment.

The PSoC family is known for its low power consumption, which is crucial for battery-operated devices. The power management features integrated into these models allow for various operational modes, making them energy-efficient and ideal for portable applications.

In summary, the Cypress CY8C24223, CY8C24423, and CY8C24123 are powerful and flexible programmable system-on-chip solutions. With a combination of configurable analog and digital blocks, solid performance specifications, and an easy-to-use development environment, these devices stand out for engineers working on innovative embedded applications across numerous industries. Their low power consumption further enhances their appeal for modern applications, making them a strong choice for designers.
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