RCV56HCF PCI/CardBus Modem Designer’s Guide
3.3.3 External Device Bus Timing
The external Device Bus timing is listed in Table
Table 3-12. Timing - External Device Bus Interface
Symbol | Description | Min. | Typ. | Max. | Units | Test Conditions |
|
|
| Read |
|
|
|
tAS | Address setup | 40 | – | – | ns |
|
tAH | Address hold | 10 | – | – | ns |
|
tCSS | Chip select setup | 40 | – | – | ns |
|
tCSH | Chip select hold | 108 | – | 144 | ns |
|
tRW | Read pulse width | 150 | – | – | ns |
|
tRDA | Read data access | – | – | 36 | ns |
|
tRDH | Read data hold | 0 | – | – | ns |
|
|
|
| Write |
|
|
|
tAS | Address setup | 40 | – | – | ns |
|
tAH | Address hold | 10 | – | – | ns |
|
tCSS | Chip select setup | 40 | – | – | ns |
|
tCSH | Chip select hold | 108 | – | 144 | ns |
|
tWW | Write pulse width | 150 | – | – | ns |
|
tWDS | Write data setup | 36 | – | – | ns |
|
tRDH | Write data hold | 36 | – | 72 | ns |
|
1129 | ROCKWELL PROPRIETARY INFORMATION |