RCV56HCF PCI/CardBus Modem Designer’s Guide
4.1.5 Ground Planes
1.In a
2.In a
3.In a design which needs EMI filtering, define an additional “chassis” section adjacent to the bracket end of a
4.Keep the current paths of separate board functions isolated, thereby reducing the current's travel distance. Separate board functions are: host interface, display, digital (SRAM, EPROM, modem), and DAA. Power and ground for each of these functions should be separate islands connected together at the power and ground source points only.
5.Connect grounds together at only one point, if possible, using a ferrite bead. Allow other points for grounds to be connected together if necessary for EMI suppression.
6.Keep all ground traces as wide as possible, at least 25 mil to 50 mil.
7.Keep the traces connecting all decoupling capacitors to power and ground at their respective ICs as short and as direct (i.e., not going through vias) as possible.
4.1.6 Crystal Circuit
1.Keep all traces and component leads connected to crystal input and output pins (i.e., XTLI and XTLO) short in order to reduce induced noise levels and minimize any stray capacitance that could affect the crystal oscillator. Keep the XTLO trace extremely short with no bends greater than 45 degrees and containing no vias since the XTLO pin is connected to a fast rise time, high current driver.
2.Where a ground plane is not available, such as in a
3.Connect crystal cases(s) to ground (if applicable).
4.Place a
5.Connect crystal capacitor ground connections directly to GND pin on the modem device. Do not use common ground plane or ground trace to route the capacitor GND pin to the corresponding modem GND pin.
4.1.7 VC_L1 and VREF Circuit
1.Provide extremely short, independent paths for VC_L1 and VREF capacitor connections.
a)Route the connection from the plus terminal of the 10 μF VC_L1 capacitor and one terminal of the 0.1 μF VC_L1 capacitor to the modem device VC_L1 pin (pin 24) using a single trace isolated from the trace to the VC_L1 pin from the VREF capacitors (see step d).
b)Route the connection from the negative terminal of the 10 μF VC_L1 capacitor and the other terminal of a the 0.1 μF VC_L1 capacitor to a ferrite bead. The bead should typically have characteristics such as: impedance = 70 Ω at a frequency of 100 MHz , rated current = 200 mA, and maximum resistance = 0.5 Ω. Connect the other bead terminal to the AGND pin (pin 34) with a single trace.
c)Route the connection from the plus terminal of the 10 μF VREF capacitor and one terminal of the 0.1 μF VREF capacitor to the modem device VREF pin (pin 25) with a single trace.
d)Route the connection from the negative terminal of 10 μF VREF capacitor and the other terminal of the 0.1 μF VREF capacitor to the modem device VC_L1 pin (pin 24) with a single trace isolated from the trace to the VC_L1 pin from the VC_L1 capacitors (see step a).
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