Hayes Microcomputer Products RCV56HCF manual Bus Interface Pin Signal Definitions, System

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RCV56HCF PCI/CardBus Modem Designer’s Guide

 

 

 

Table 3-2. Bus Interface Pin Signal Definitions

 

 

 

 

Label

I/O Type

 

Signal Name/Description

 

 

 

SYSTEM

XIN,

It

 

Crystal In and Crystal Out. Connect XIN and XOUT to a 28.224 MHz external crystal circuit.

XOUT

Ot2

 

 

 

 

 

 

VDD

PWR

 

Digital Supply Voltage. Connect to 3.3V.

GND

GND

 

Digital Ground. Connect to digital ground.

CARDBUS#

It

 

CardBus Interface Select. Selects CardBus (low) or PCI Bus (high) drive strength. For PCI Bus, connect to

 

 

 

VCC through 1K ohm.

 

 

 

 

VGG1

PWR

 

I/O Voltage Tolerance Reference. Connect to VCC.

VIO

PWR

 

I/O Signaling Voltage Source. Connect to 3.3V.

 

 

 

PCI BUS INTERFACE

PCICLK

Ip

 

PCI Bus Clock. The PCICLK (PCI Bus CLK signal) input provides timing for all transactions on PCI.

 

(in)

 

 

 

 

 

 

CLKRUN#

Ip,

 

Clock Running. CLKRUN# is an input used to determine the status of CLK and an open drain output used

 

(in, o/d,

 

to request starting or speeding up CLK. Connect to GND through 1KΩ for PCI designs.

 

s/t/s)

 

 

 

 

 

 

PCIRST#

Ip

 

PCI Bus Reset. PCIRST# (PCI Bus RST# signal) is used to bring PCI-specific registers, sequencers, and

 

(in)

 

signals to a consistent state.

AD[31:0]

I/Opts

 

Multiplexed Address and Data. Address and Data are multiplexed on the same PCI pins.

 

(t/s)

 

 

CBE[3:0]#

I/Opts

 

Bus Command and Bus Enable. Bus Command and Byte Enables are multiplexed on the same PCI pins.

 

(t/s)

 

During the address phase of a transaction, C/BE[3:0]# define the bus command. During the data phase,

 

 

 

C/BE[3:0]# are used as Byte Enables.

PAR

I/Opts

 

Parity. Parity is even parity across AD[31::00] and C/BE[3::0]#. The master drives PAR for address and

 

(t/s)

 

write data phases; the Bus Interface drives PAR for read data phases.

FRAME#

I/Opsts

 

Cycle Frame. FRAME# is driven by the current master to indicate the beginning and duration of an access.

 

(s/t/s)

 

 

 

 

 

 

IRDY#

I/Opsts

 

Initiator Ready. IRDY# is used to indicate the initiating agent’s (bus master’s) ability to complete the current

 

(s/t/s)

 

data phase of the transaction. IRDY# is used in conjunction with TRDY#.

 

 

 

 

TRDY#

I/Opsts

 

Target Ready. TRDY# is used to indicate s the Bus Interface’s ability to complete the current data phase of

 

(s/t/s)

 

the transaction. TRDY# is used in conjunction with IRDY#.

STOP#

I/Opsts

 

Stop. STOP# is asserted to indicate the Bus Interface is requesting the master to stop the current

 

(s/t/s)

 

transaction.

IDSEL

Ip

 

Initialization Device. IDSEL input is used as a chip select during configuration read and write transactions.

 

(in)

 

 

 

 

 

 

DEVSEL#

I/Opsts

 

Device Select. When actively driven, DEVSEL# indicates the driving device has decoded its address as the

 

(s/t/s)

 

target of the current access. As an input, DEVSEL# indicates whether any device on the bus has been

 

 

 

selected.

TRDY#

I/Opts

 

Request. TRDY# is used to indicate to the arbiter that this agent desires use of the bus.

 

(t/s)

 

 

 

 

 

 

GNT#

I/Opts

 

Grant. GNT# is used to indicate to the agent that access to the bus has been granted.

 

(t/s)

 

 

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ROCKWELL PROPRIETARY INFORMATION

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Contents RCV56HCF RCV56HCF PCI/CardBus Modem Designer’s Guide Table of Contents Command SET Rockwell Proprietary Information List of Figures List of Tables Summary FeaturesRCV56HCF PCI/CardBus Modem Designer’s Guide Marketing Modem Models and FunctionsModel Number1 FdspPC Software RCV56HCF Hardware Configuration Block Diagram Data Pump BUS Operating Modes Technical OverviewGeneral Description Hardware Interfaces Host-Controlled Modem SoftwareDownloadable Modem Data Pump Firmware RCV56HCF PCI/CardBus Modem Designer’s Guide Typical Audio Signal Interface U.S Relay Positions VoiceView Mode Typical Signal Routing Voice Mode+VLS= VOICE# CIDL1#This page is intentionally blank Establishing Data Modem Connections Data ModeVOICE/AUDIO Mode Error Correction and Data CompressionMNP 10EC Enhanced Cellular Connection FAX Class 1 OperationVoiceview HOST-BASED Dsvd ModeFULL-DUPLEX Speakerphone Fdsp Mode LOW Power Sleep Mode DiagnosticsCaller ID World Class Country SupportHardware Interface Hardware Signal Pins and DefinitionsTqfp 11229 BUS InterfaceRCV56HCF MDP PIN Tqfp R6776Bus Interface 176-Pin Tqfp Hardware Interface Signals Bus Interface 176-Pin Tqfp Pin Signals Pin Signal Label Type1 Interface DEVSEL# PCI BUS Interface Bus Interface Pin Signal DefinitionsSystem Serial Eeprom Interface NMC93C56 or Equivalent Bus Interface Pin Signal Definitions Cont’dDAA Interface ReservedMDP Interface Isdn Interface Isdn Models Isdn Interface NON-ISDN ModelsMDP 144-Pin Tqfp Hardware Interface Signals MDP 144-Pin Tqfp Pin Signals Pin Signal Label Interface3 Type1 MDP Pin Signals 144-Pin TqfpPllgnd PLL Overhead Signals MDP Pin Signal DefinitionsBIF to MDP Interface MDP to Siemens PSB2186 S/T InterfacePllgnd Connection. Connect to Agnd MDP Signal Definitions ContdModem INTERCONNECT/NO Connect Power and Maximum Ratings ELECTRICAL,SWITCHING,AND Environmental CharacteristicsCurrent and Power Requirements Maximum RatingsPCI Bus AC Specifications for 3.3V Signaling PCI Bus DC Specifications for 3.3V SignalingSymbol Parameter Condition Min Max Units PCI Bus3 MDP MDP Digital Electrical CharacteristicsParameter Symbol Min Typ Max Units Test Conditions Name Type Characteristic Value 10. Analog Electrical CharacteristicsTELINL1 TXA1L1PCI Bus Timing Interface Timing and WaveformsSerial Eeprom Timing 11. Timing Serial Eeprom InterfaceExternal Device Bus Timing Symbol Description Min Typ Max Units Test Conditions Read12. Timing External Device Bus Interface WriteISDNCS# DWR# DD0-DD7 ISDNCS# DRD# DD0-DD713. Timing IOM-2 Interface IOM-2 InterfaceThis page is intentionally blank General Principles Component PlacementPC Board Layout Guidelines Signal Routing Modem Pin Noise Characteristics PowerDevice Function Noise Source Neutral Noise Sensitive MDP VDD, VAA7 VCL1 and Vref Circuit Ground PlanesCrystal Circuit Optional Configurations CRYSTAL/OSCILLATOR SpecificationsOther Considerations Telephone and Local Handset InterfaceCharacteristic Value Crystal Specifications Surface MountElectrical MechanicalCrystal Specifications Through Hole Package Dimensions 144-Pin Tqfp Package DimensionsRCV56HCF PCI/CardBus Modem Designer’s Guide This page is intentionally blank Vendor ID Field PCI Configuration RegistersDevice ID Field Bit Offset 3124 2316 158 HexBit Description Command RegisterStatus Register Base Address Register Serial Eeprom Interface Eeprom Configuration DataEeprom Address Copied to CIS RAMCommand Set Summary Functional Use Sort Command SETData Compression Command Set Summary Functional Use Sort Cont’dVoice Commands Command Set Summary Alphanumeric Sort Command Set Summary Alphanumeric Sort Cont’d RCV56HCF PCI/CardBus Modem Designer’s Guide Inside Back Cover Regional Sales Offices
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