Chapter 1. Introduction | |
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Traffic Management
Loopback Mode
ATM cells are transferred from one interface to the other through an internal bus, the bandwidth of which is 180 Mbps.
∙Cells that are received with a
∙Cells received at the slower interface are transferred directly to the other interface.
∙Cells received at the faster interface are transferred through the FIFO which absorbs temporary bursts of ATM cells and transfers them according to the other interface data rate.
∙The FIFO depth is 6K cells in SONET/SDH interfaces and 3K cells in other interfaces.
The
∙The total bandwidth of CBR cells cannot exceed the slow interface bandwidth.
∙The total bandwidth of VBR cells can only temporarily exceed the slow interface data rate. If this bandwidth is exceeded, cells are queued in FIFO and are transferred according to the slow interface data rate.
∙The
∙In order to control the UBR/ABR traffic bandwidth, you can configure the
∙You can configure the
∙The number of cells from a certain VP/VC is limited to 3/4 of the total queue depth, in order to minimize the effects of large bursts of data from one VC on the other VCs in the
∙The
Each