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Operation
3.10 Camera Timing Charts
Model:
Master Clock: 100 MHz, M=10 nsec
Pixel Clock: 50 MHz, P= 20 nsec
1. Pixel Clock and Digital Data
Pixel Clock
A
Data
Tcd
Tcd: Clock to Data Ready
Tdc: Data Ready to Next Clock
Thd: Data Hold Time
Operation Mode: 30 Frame /sec
TdcT | hd |
Tcc =14 nsec, Tdc = 6 nsec, Thd = 5 nsec.
2. Horizontal Signals | fHD = [ 31.09KHz] |
| tHD = [ 32.16 µs] |
External HD
[ 3 P], (60 ns) |
|
Internal HD | A [ 1447 P], (28.94 µs) |
| |
| B [ 1608 P], (32.16 µs) |
C [12 P], (240 µs) |
|
| D [ 216 P], (4.32 µs) |
LDV | E [ 1392 P], (27.84 µs) |
| |
| F [ 1608 P], (32.16µs) |
Digital Data |
|
| G [ 1392 P], (27.84 µs) |
Analog Video | H [ 216 P], (4.32 µs) |
| K [ 1392 P], (27.84 µs) |
I [ 48 P], (960 ns) | L [ 61 P], (1.22µs) |
J [ 168P], ( 3.36 µs) |