SOYO 6KB82440 manual Cpu-To-Pci Ide

BIOS Setup	25
EDO RAS# Precharge	Use the default setting.
Time
EDO DRAM Read Burst	Use the default setting.
DRAM Write Burst	Use the default setting.
DRAM Data Integrity	Choose Non-ECC (default) or ECC
Mode	according to the DRAM type you have.
CPU-TO-PCI IDE	Use the default setting.
Posting
System BIOS Cacheable	Disabled: The ROM area F0000H-
	FFFFFH is not cached.
	Enabled: The ROM area F0000H-
	FFFFFH is cacheable if cache
	controller is enabled.

Video BIOS Cacheable

8Bit I/O Recovery Time 16Bit I/O Recovery Time

Memory Hole At 15M- 16M

Passive Release

Delayed Transaction

AGP Aperture Size

Disabled: The video BIOS C0000H- C7FFFH is not cached.

Enabled: The video BIOS C0000H- C7FFFH is cacheable if cache controller is enabled.

Use the default setting.

Use the default setting.

Choose Enabled or Disabled (default). Some interface cards will map their ROM address to this area. If this occurs, you should select Enabled, otherwise use Disabled.

Use the default setting.

Use the default setting.

AGP could use the DRAM as its video RAM. Choose the DRAM size that you want it to be used as video RAM. The range is from 4MB to 256MB.