Transcend Information TS16GSSD25S-M, TS128GSSD25S-M, TS8GSSD25S-S Power on sequence timing diagram

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TS8GSSD25S-S

 

TS16GSSD25S-S/M

 

TS32GSSD25S-S/M

 

TS64GSSD25S-S/M

 

TS128GSSD25S-M

2.5” Solid State Disk

TS192GSSD25S-M

5.Host locks – after detecting the COMWAKE, the host starts transmitting D10.2 characters at its lowest supported rate. Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at the same speed as received. A host shall be designed such that it acquires lock in 54.6 us (2048 nominal Gen1 Dword times) at any given speed. The host should allow for at least 873.8 us (32768 nominal Gen1 Dword times) after detecting the release of COMWAKE to receive the first ALIGNP. This ensures interoperability with multi-generational and synchronous designs. If no ALIGNP is received within 873.8 us (32768 nominal Gen1 Dword times) the host restarts the power-on sequence – repeating indefinitely until told to stop by the Application layer. 6. Device locks – the device locks to the ALIGN sequence and, when ready, sends SYNCP indicating it is ready to start normal operation.

6.Upon receipt of three back-to-back non-ALIGNPprimitives, the communication link is established and normal operation may begin.

Power on sequence timing diagram

The following timing diagrams and descriptions are provided for clarity and are informative.

 

Figure 7 : power on sequence

Transcend Information Inc.

14

V1.08

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Contents Description Placement FeaturesDimensions V1.08Specifications Model P/N User Max. LBA Cylinder Head Sector Model P/N Sequential ReadMaxSequential WriteMax Compliance Data Reliability Data RetentionOperating Non-Operating Package Dimensions Pin No Pin Name Pin AssignmentsPin Layout Block Diagram ECC algorithm ReliabilityWear-Leveling algorithm Bad-block managementOut of bank signaling Sata InterfaceComreset TS192GSSD25S-M Cominit TS192GSSD25S-M Power on sequence timing diagram Power on sequenceATA command register Command Table Command Name CodeSET Features ATA Command Specifications Identify Device Information Default Value Word Value DescriptionPIO data transfer cycle timing mode Reserved TS192GSSD25S-M Minor version number TS192GSSD25S-M TS192GSSD25S-M Current AAM value 15-8 Vendor’s recommended AAM value 95-99 Initialize Device Parameters 91h Idle E3hIdle Immediate E1h Read Buffer E4hRead Fpdma Queued 60h Log Address Log Name Feature Set AccessRead DMA EXT 25h Read LOG EXT 2FhRead Verify Sectors EXT 42h Security Disable Password F6hRead Verify Sectors 40h/41h Recalibrate 10hSecurity Unlock F2h Security set Password data contentSecurity SET Password F1h Features register Value and settable operating mode Code Smart Subcommand Smart Function Set B0hByte 2-361 Individual attribute data Byte DescriptionAttribute ID information is listed in the following table Description Detail Information ByteSmart Read Attribute Threshold Smart Enabl Operations Write Buffer E8h Standby E2hStandby Immediate E0h Write DMA CAhWrite Sectors 30h/31h Write Multiple EXT 39hWrite Multiple FUA EXT CEh Write Sectors EXT 34hOrdering Information Taiwan Germany
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