Advantech PCI-1784 specifications Board ID setting SW1

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Setting the time to reset the digital outputs and the counter value

Some users will want the capability of clearing each counter and the isolated digital output when the system (or PC) issues a reset signal on the PCI bus. Some users will want to clear their counter and digital output only as part of system power-on.

The PCI-1784 satisfies both these needs by providing jumper JP2. Depending on the application, this capability may allow counter value and the isolated digital outputs to be "OFF" without requiring a complete shutdown of processes controlled by the card.

Complete loss of power to the chip clears the chip memory. Thus, no matter how JP2 is set, if the power to the PCI-1784 is disconnected, the counter value and the isolated digital output initial power-on state will be "OFF".

Board ID setting (SW1)

ID3	ID2	ID1	ID0	Board ID
1	1	1	1	0
1	1	1	0	1
1	1	0	1	2
1	1	0	0	3
1	0	1	1	4
1	0	1	0	5
1	0	0	1	6
1	0	0	0	7
0	1	1	1	8
0	1	1	0	9
0	1	0	1	10
0	1	0	0	11
0	0	1	1	12
0	0	1	0	13
0	0	0	1	14
0	0	0	0	15

Note: On: 1, Off: 0

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Contents Page Page Contents Appendix D. Operation Features IntroductionEncoder Interface Counters Digital Input and InterruptsFlexible Digital Output function Special Shielded Cable for Noise ReductionBoard ID Installation Guide ApplicationsInstallation Flow Chart Software Overview Device DriversRegister-level Programming Device Drivers Programming Roadmap Programming ToolsTroubleshooting Device Drivers Error Programming with Device Drivers Function LibraryAccessories Wiring CableWiring Boards Installation UnpackingPage Driver Installation Setup Screen of Advantech Automation SoftwareHardware Installation Select the Individual Drivers optionPage Device name listed on the Device Manager Device Setup & Configuration Board selection Setting Up and configure the device ‘Setup’ dialog boxOperation dialog box Signal Connections Switch and Jumper SettingsOverview Names of Jumpers Function descriptionBoard ID setting SW1 Signal Connections Connector Signal DescriptionPin Assignment Quadrature encoder input Single ended Outputs EncoderQuadrature encoder up/down counter input connections Isolated digital input Isolated digital outputAppendix A. Specifications TimerEncoder Output Interrupt Counter LatchGeneral Appendix B. Block Diagram ADDRESS, Control and Data BUSPage Appendix C. Register Structure and Format I/O Port Address MapTable C-1 PCI-1784 register format Part + HEX1CH Clock Control Counter 0/1/2/3 mode BASE+00/04/08/0CH Table C-2 PCI-1784 Register for counter 0/1/2/3 modeDI0 Counter 0/1/2/3 latch data BASE+00/04/08/0CH Table C-3 PCI-1784 Register for counter 0/1/2/3 latch dataCounter 0/1/2/3 compare data BASE+10/14/18/1CH Table C-4 PCI-1784 Register for counter 0/1/2/3 compare dataInterrupt control register BASE+20H Table C-5 PCI-1784 Register for interrupt controlInterrupt status register BASE+20H Table C-6 PCI-1784 Register for interrupt statusClear Interrupt BASE+24H Table C-7 PCI-1784 Register for clock controlTable C-8 PCI-1784 Register for clear interrupt Software latch BASE+28H Table C-9 PCI-1784 Register for software latchBoard ID BASE+28H Table C-10 PCI-1784 Board ID dataReset counter BASE+2CH Table C-11 PCI-1784 Register for reset counterDigital output BASE+30H Table C-12 PCI-1784 Register for digital outputDigital input/output BASE+30H Table C-13 PCI-1784 Register for digital input/outputPage Appendix D. Operation Quadrature encoder introductionMode Maximum input rate 8MHz 4MHz 2MHz 1MHz Quadrature input counter modeCounter modes Single-ended vs. differential inputPulse mode Pulse/direction modeDisabled mode Digital noise filterLatch mode Clock frequency Maximum widthLatch Index latchCounter reset value Timer functionInterrupt function