C.3 Counter 0/1/2/3 mode — BASE+00/04/08/0CH
Table C-2 PCI-1784 Register for counter 0/1/2/3 mode
Base Addr. | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
| 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
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31 | 30 | 29 | 28 | 27 | 26 | 25 |
| 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | ||||
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| Counter 0 Mode |
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00H | W |
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DI3 | DI2 | DI1 | DI0 |
| TM | IX |
| SW |
| DF |
| UL | OL | RF |
| M2 | M1 | M0 | ||
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| Counter 1 Mode |
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04H | W |
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DI3 | DI2 | DI1 | DI0 |
| TM | IX |
| SW |
| DF |
| UL | OL | RF |
| M2 | M1 | M0 | ||
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| Counter 2 Mode |
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08H | W |
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DI3 | DI2 | DI1 | DI0 |
| TM | IX |
| SW |
| DF |
| UL | OL | RF |
| M2 | M1 | M0 | ||
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| Counter 3 Mode |
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0CH | W |
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DI3 | DI2 | DI1 | DI0 |
| TM | IX |
| SW |
| DF |
| UL | OL | RF |
| M2 | M1 | M0 | ||
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M2 ~ M0 | Counter input mode control | |
| 000 | Disable |
| 001 | Quadrature input x 1 |
| 010 | Quadrature input x 2 |
| 011 | Quadrature input x 4 |
| 100 | 2 pulse input |
| 101 | 1 pulse input |
| 110 | N/A |
| 111 | N/A |
RF | Set counter reset value | |
| 0 | 80000000h |
| 1 | 00000000h |
OL | Counter overflow lock control | |
| 0 | Counter continues counting (wraps over) when |
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| counter overflow |
| 1 | Counter locked when counter overflow |
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