Advantech PCI-1784 specifications Counter 0/1/2/3 latch data BASE+00/04/08/0CH

Page 39

C.4 Counter 0/1/2/3 latch data — BASE+00/04/08/0CH

Table C-3 PCI-1784 Register for counter 0/1/2/3 latch data

Base Addr.

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

Counter 0 Latch Data

00H

R

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

Counter 1 Latch Data

04H

R

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

Counter 2 Latch Data

08H

R

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

Counter 3 Latch Data

0CH

R

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

D31 ~ D0

Counter latch data

35

Image 39

Contents Page Page Contents Appendix D. Operation Features IntroductionEncoder Interface Special Shielded Cable for Noise Reduction CountersDigital Input and Interrupts Flexible Digital Output functionBoard ID Applications Installation GuideInstallation Flow Chart Software Overview Device DriversRegister-level Programming Programming Tools Device Drivers Programming RoadmapProgramming with Device Drivers Function Library Troubleshooting Device Drivers ErrorAccessories Wiring CableWiring Boards Unpacking InstallationPage Setup Screen of Advantech Automation Software Driver InstallationSelect the Individual Drivers option Hardware InstallationPage Device name listed on the Device Manager Board selection Device Setup & Configuration‘Setup’ dialog box Setting Up and configure the deviceOperation dialog box Names of Jumpers Function description Signal ConnectionsSwitch and Jumper Settings OverviewBoard ID setting SW1 Signal Connections Connector Signal DescriptionPin Assignment Single ended Outputs Encoder Quadrature encoder inputQuadrature encoder up/down counter input connections Isolated digital output Isolated digital inputAppendix A. Specifications TimerEncoder Output Interrupt Counter LatchGeneral ADDRESS, Control and Data BUS Appendix B. Block DiagramPage I/O Port Address Map Appendix C. Register Structure and Format+ HEX Table C-1 PCI-1784 register format Part1CH Clock Control Table C-2 PCI-1784 Register for counter 0/1/2/3 mode Counter 0/1/2/3 mode BASE+00/04/08/0CHDI0 Table C-3 PCI-1784 Register for counter 0/1/2/3 latch data Counter 0/1/2/3 latch data BASE+00/04/08/0CHTable C-4 PCI-1784 Register for counter 0/1/2/3 compare data Counter 0/1/2/3 compare data BASE+10/14/18/1CHTable C-5 PCI-1784 Register for interrupt control Interrupt control register BASE+20HTable C-6 PCI-1784 Register for interrupt status Interrupt status register BASE+20HTable C-7 PCI-1784 Register for clock control Clear Interrupt BASE+24HTable C-8 PCI-1784 Register for clear interrupt Table C-9 PCI-1784 Register for software latch Software latch BASE+28HTable C-10 PCI-1784 Board ID data Board ID BASE+28HTable C-11 PCI-1784 Register for reset counter Reset counter BASE+2CHTable C-12 PCI-1784 Register for digital output Digital output BASE+30HTable C-13 PCI-1784 Register for digital input/output Digital input/output BASE+30HPage Quadrature encoder introduction Appendix D. OperationSingle-ended vs. differential input Mode Maximum input rate 8MHz 4MHz 2MHz 1MHzQuadrature input counter mode Counter modesDigital noise filter Pulse modePulse/direction mode Disabled modeIndex latch Latch modeClock frequency Maximum width LatchTimer function Counter reset valueInterrupt function