Advantech PCI-1784 specifications Clock Control

Page 36

Table C-1 PCI-1784 register format (Part 3)

Base

 

 

 

 

 

 

PCI-1784 Register Format

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address

15

14

13

12

11

10

9

8

7

6

 

5

4

3

2

1

0

+ HEX

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31

30

29

28

27

26

25

24

23

22

 

21

20

19

18

17

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Interrupt Control

 

 

 

 

 

 

 

W

DI3

DI2

DI1

DI0

IX3

IX2

IX1

 

IX0

UN3

UN2

UN1

UN0

OV3

OV2

OV1

OV0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20H

 

IE

 

 

TM

 

 

 

 

 

UC3

UC2

UC1

UC0

OC3

OC2

OC1

OC0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Interrupt Status

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DI3

DI2

DI1

DI0

IX3

IX2

IX1

 

IX0

UN3

UN2

UN1

UN0

OV3

OV2

OV1

OV0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IF

 

 

TM

 

 

 

 

 

UC3

UC2

UC1

UC0

OC3

OC2

OC1

OC0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24H

W

R

Clock Control

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SC1

SC0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TB2

TB1

TB0

DV7

DV6

DV5

DV4

DV3

DV2

DV1

DV0

 

 

 

 

 

 

Clear Interrupt

 

28H

W

R

Software Latch

SL3 SL2 SL1 SL0

Board ID

BD3 BD2 BD1 BD0

Reset Counter

2CH

W

R

SR3 SR2 SR1 SR0

N/A

Digital Output

30H

W

 

 

 

 

 

 

 

 

 

 

 

 

DO3

DO2

DO1

DO0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DM3

DM2

DM1

DM0

LE3

LE2

LE1

LE0

UC3

UC2

UC1

UC0

OC3

OC2

OC1

OC0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Digital Input/Output

 

 

 

 

 

 

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DI3

DI2

DI1

DI0

DO3

DO2

DO1

DO0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DM3

DM2

DM1

DM0

LE3

LE2

LE1

LE0

UC3

UC2

UC1

UC0

OC3

OC2

OC1

OC0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

Page 35 Page 37
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Page 35 Page 37
Contents Page Page Contents Appendix D. Operation Features IntroductionEncoder Interface Counters Digital Input and InterruptsFlexible Digital Output function Special Shielded Cable for Noise ReductionBoard ID Installation Guide ApplicationsInstallation Flow Chart Software Overview Device DriversRegister-level Programming Device Drivers Programming Roadmap Programming ToolsTroubleshooting Device Drivers Error Programming with Device Drivers Function LibraryAccessories Wiring CableWiring Boards Installation UnpackingPage Driver Installation Setup Screen of Advantech Automation SoftwareHardware Installation Select the Individual Drivers optionPage Device name listed on the Device Manager Device Setup & Configuration Board selectionSetting Up and configure the device ‘Setup’ dialog boxOperation dialog box Signal Connections Switch and Jumper SettingsOverview Names of Jumpers Function descriptionBoard ID setting SW1 Signal Connections Connector Signal DescriptionPin Assignment Quadrature encoder input Single ended Outputs EncoderQuadrature encoder up/down counter input connections Isolated digital input Isolated digital outputAppendix A. Specifications TimerEncoder Output Interrupt Counter LatchGeneral Appendix B. Block Diagram ADDRESS, Control and Data BUSPage Appendix C. Register Structure and Format I/O Port Address MapTable C-1 PCI-1784 register format Part + HEX1CH Clock Control Counter 0/1/2/3 mode BASE+00/04/08/0CH Table C-2 PCI-1784 Register for counter 0/1/2/3 modeDI0 Counter 0/1/2/3 latch data BASE+00/04/08/0CH Table C-3 PCI-1784 Register for counter 0/1/2/3 latch dataCounter 0/1/2/3 compare data BASE+10/14/18/1CH Table C-4 PCI-1784 Register for counter 0/1/2/3 compare dataInterrupt control register BASE+20H Table C-5 PCI-1784 Register for interrupt controlInterrupt status register BASE+20H Table C-6 PCI-1784 Register for interrupt statusClear Interrupt BASE+24H Table C-7 PCI-1784 Register for clock controlTable C-8 PCI-1784 Register for clear interrupt Software latch BASE+28H Table C-9 PCI-1784 Register for software latchBoard ID BASE+28H Table C-10 PCI-1784 Board ID dataReset counter BASE+2CH Table C-11 PCI-1784 Register for reset counterDigital output BASE+30H Table C-12 PCI-1784 Register for digital outputDigital input/output BASE+30H Table C-13 PCI-1784 Register for digital input/outputPage Appendix D. Operation Quadrature encoder introductionMode Maximum input rate 8MHz 4MHz 2MHz 1MHz Quadrature input counter modeCounter modes Single-ended vs. differential inputPulse mode Pulse/direction modeDisabled mode Digital noise filterLatch mode Clock frequency Maximum widthLatch Index latchCounter reset value Timer functionInterrupt function
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