Advantech specifications Reset counter BASE+2CH, Table C-11 PCI-1784 Register for reset counter

Page 47

C.12 Reset counter — BASE+2CH

Table C-11 PCI-1784 Register for reset counter

Base Addr.

15

14

13

12

11

10

9

 

8

7

 

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31

30

29

28

27

26

25

 

24

23

 

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset Counter

 

 

 

 

 

 

 

2CH

W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SR3

SR2

SR1

SR0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SRn

Reset counter command (n: 0 ~ 3)

 

0

N/A

 

1

Reset counter to default value

43

Image 47
Contents Page Page Contents Appendix D. Operation Encoder Interface FeaturesIntroduction Special Shielded Cable for Noise Reduction CountersDigital Input and Interrupts Flexible Digital Output functionBoard ID Applications Installation GuideInstallation Flow Chart Register-level Programming Software OverviewDevice Drivers Programming Tools Device Drivers Programming RoadmapProgramming with Device Drivers Function Library Troubleshooting Device Drivers ErrorWiring Boards AccessoriesWiring Cable Unpacking InstallationPage Setup Screen of Advantech Automation Software Driver InstallationSelect the Individual Drivers option Hardware InstallationPage Device name listed on the Device Manager Board selection Device Setup & Configuration‘Setup’ dialog box Setting Up and configure the deviceOperation dialog box Names of Jumpers Function description Signal ConnectionsSwitch and Jumper Settings OverviewBoard ID setting SW1 Pin Assignment Signal ConnectionsConnector Signal Description Single ended Outputs Encoder Quadrature encoder inputQuadrature encoder up/down counter input connections Isolated digital output Isolated digital inputEncoder Output Appendix A. SpecificationsTimer General InterruptCounter Latch ADDRESS, Control and Data BUS Appendix B. Block DiagramPage I/O Port Address Map Appendix C. Register Structure and Format+ HEX Table C-1 PCI-1784 register format Part1CH Clock Control Table C-2 PCI-1784 Register for counter 0/1/2/3 mode Counter 0/1/2/3 mode BASE+00/04/08/0CHDI0 Table C-3 PCI-1784 Register for counter 0/1/2/3 latch data Counter 0/1/2/3 latch data BASE+00/04/08/0CHTable C-4 PCI-1784 Register for counter 0/1/2/3 compare data Counter 0/1/2/3 compare data BASE+10/14/18/1CHTable C-5 PCI-1784 Register for interrupt control Interrupt control register BASE+20HTable C-6 PCI-1784 Register for interrupt status Interrupt status register BASE+20HTable C-7 PCI-1784 Register for clock control Clear Interrupt BASE+24HTable C-8 PCI-1784 Register for clear interrupt Table C-9 PCI-1784 Register for software latch Software latch BASE+28HTable C-10 PCI-1784 Board ID data Board ID BASE+28HTable C-11 PCI-1784 Register for reset counter Reset counter BASE+2CHTable C-12 PCI-1784 Register for digital output Digital output BASE+30HTable C-13 PCI-1784 Register for digital input/output Digital input/output BASE+30HPage Quadrature encoder introduction Appendix D. OperationSingle-ended vs. differential input Mode Maximum input rate 8MHz 4MHz 2MHz 1MHzQuadrature input counter mode Counter modesDigital noise filter Pulse modePulse/direction mode Disabled modeIndex latch Latch modeClock frequency Maximum width LatchTimer function Counter reset valueInterrupt function