Advantech specifications Table C-8 PCI-1784 Register for clear interrupt

Page 44

C.9 Clear Interrupt — BASE+24H

Read this register to clear the interrupt.

Table C-8 PCI-1784 Register for clear interrupt

Base Addr.

15

14

13

12

11

10

9

 

8

7

 

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31

30

29

28

27

26

25

 

24

23

 

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clear Interrupt

 

 

 

 

 

 

 

24H

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

40

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Page 43 Page 45
Contents Page Page Contents Appendix D. Operation Encoder Interface FeaturesIntroduction Counters Digital Input and InterruptsFlexible Digital Output function Special Shielded Cable for Noise ReductionBoard ID Installation Guide ApplicationsInstallation Flow Chart Register-level Programming Software OverviewDevice Drivers Device Drivers Programming Roadmap Programming ToolsTroubleshooting Device Drivers Error Programming with Device Drivers Function LibraryWiring Boards AccessoriesWiring Cable Installation UnpackingPage Driver Installation Setup Screen of Advantech Automation SoftwareHardware Installation Select the Individual Drivers optionPage Device name listed on the Device Manager Device Setup & Configuration Board selectionSetting Up and configure the device ‘Setup’ dialog boxOperation dialog box Signal Connections Switch and Jumper SettingsOverview Names of Jumpers Function descriptionBoard ID setting SW1 Pin Assignment Signal ConnectionsConnector Signal Description Quadrature encoder input Single ended Outputs EncoderQuadrature encoder up/down counter input connections Isolated digital input Isolated digital outputEncoder Output Appendix A. SpecificationsTimer General InterruptCounter Latch Appendix B. Block Diagram ADDRESS, Control and Data BUSPage Appendix C. Register Structure and Format I/O Port Address MapTable C-1 PCI-1784 register format Part + HEX1CH Clock Control Counter 0/1/2/3 mode BASE+00/04/08/0CH Table C-2 PCI-1784 Register for counter 0/1/2/3 modeDI0 Counter 0/1/2/3 latch data BASE+00/04/08/0CH Table C-3 PCI-1784 Register for counter 0/1/2/3 latch dataCounter 0/1/2/3 compare data BASE+10/14/18/1CH Table C-4 PCI-1784 Register for counter 0/1/2/3 compare dataInterrupt control register BASE+20H Table C-5 PCI-1784 Register for interrupt controlInterrupt status register BASE+20H Table C-6 PCI-1784 Register for interrupt statusClear Interrupt BASE+24H Table C-7 PCI-1784 Register for clock controlTable C-8 PCI-1784 Register for clear interrupt Software latch BASE+28H Table C-9 PCI-1784 Register for software latchBoard ID BASE+28H Table C-10 PCI-1784 Board ID dataReset counter BASE+2CH Table C-11 PCI-1784 Register for reset counterDigital output BASE+30H Table C-12 PCI-1784 Register for digital outputDigital input/output BASE+30H Table C-13 PCI-1784 Register for digital input/outputPage Appendix D. Operation Quadrature encoder introductionMode Maximum input rate 8MHz 4MHz 2MHz 1MHz Quadrature input counter modeCounter modes Single-ended vs. differential inputPulse mode Pulse/direction modeDisabled mode Digital noise filterLatch mode Clock frequency Maximum widthLatch Index latchCounter reset value Timer functionInterrupt function
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