5.4.2The Write Channel
The signal path for the Write Channel follows the reverse order of that for the Read Channel. The host transmits data via the AT bus to the 88i1022 Interface Controller. The Buffer Controller section of the 88i1022 stores the data in the cache. Because the data is transmitted to the drive at a rate that exceeds the rate at which the drive can write data to the disk, data is stored temporarily in the cache. Thus, the host can present data to the drive at a rate independent of the rate at which the drive can write data to the disk.
Upon correct identification of the target address, the data is shifted to the Sequencer, which generates and appends an error correcting code. The Sequencer then converts the bytes of data to a serial bit stream. The AT controller also generates a preamble field, inserts an address mark, and transmits the data to the ENDEC in the R/W IC where the data is encoded into the LDPC format and
The 88i1022 switches the Preamplifier and Write Driver IC to write mode and selects a head. Once the Preamplifier and Write Driver IC receives a write gate signal, it transmits current reversals to the head, which writes magnetic transitions on the disk.
5.5 Firmware Features
This section describes the following firmware features:
Read Caching
Write Caching
Track Skewing
Defect Management
Automatic Defect Allocation
ECC Correction
SMART
ATA security mode features
ATA host protected area
ATA streaming features
ATA power up in stand by feature set
ATA advanced power management (APM) feature set
ATA device configuration overlay (DCO) feature set
5.5.1Read Caching
The Spinpoint M9T hard disk drive uses Read Cache to enhance drive performance and significantly improve system throughput. Use the SET FEATURES command to enable or disable Read Caching. Read caching anticipates
There is a high probability that subsequent data requested will be in the cache, because more than 50 percent of all
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