Samsung M9T manual Sata, Reference

Page 8

SCOPE

1.3SATA

The ATA (Advanced Technology Attachment) interface which was developed based on the IDE (Integrated Drive Electronics) has been around from 1980’s. As the PC processor speed has improved, so have the data rates of the HDD. The parallel ATA is reaching its limit of 133 MB/s data transfer rate. Serial implementation of ATA (SATA) will allow the data rate to run even faster so the processor will be utilized more efficiently. Serial ATA has been developed to provide the next generation storage interface.

SATA interface replaces 2 inch wide, 40 pin parallel interface connector with 0.25 inch wide 7 pin serial interface connector. The maximum length of the SATA interface cable can be extended to 1 meter (approximately 39 inches) compared to 18 inch of parallel ATA. SATA also allows a data transfer speed of 150 MB/s, 300 MB/s, and 600 MB/s. Even though SATA will not directly interface w i t h P a r a l l e l o r t r a d i t i o n a l A T A (PATA) hardware, it is compliant with ATA protocol and therefore software compatible. The cable geometry with smaller footprint connector reduces board space requirements and improves air flow and heat exchange inside computer systems.

SATA uses point to point connection topology and each channel works independently. There is no sharing of interface, master/slave drive configuration, and no master/slave jumper settings. This is different from Parallel ATA (PATA) architecture where 2 drives per port are supported by a shared bus and drives are designated as master or slave drive based on jumper pin or cable selection. Unlike parallel ATA, SATA drives are hot-plug and hot-swappable.

1.4Reference

For additional information about the AT interface, refer to:

ATA-2 (AT Attachment 2), Revision 3, January, 1995

ATA-3 (Attachment-3 Interface) Revision 7b, 27 January, 1997

ATA-4 (AT Attachment with Packet Interface Extension) Revision 18, 19 August, 1998

ATA-5 (AT Attachment with Packet Interface Extension) Revision 3, 29 February, 2000

ATA-6 (AT Attachment with Packet Interface Extension) Revision 2a, 26 September, 2001

ATA-7 (AT Attachment with Packet Interface Extension) Revision 1, 28 August, 2002

ATA-8 (AT Attachment with Packet Interface Extension) Revision 0, 16 September, 2008

For introduction about SATA interface please refer to:

SATA 1.0 Design Guides, April 5, 2002.

(URL: http:// www.serialdata.org retrieved on May 22, 2003)

Serial ATA: A comparison with Ultra ATA Technology

(URL: http://www.intel.com retrieved April 18,2003)

Serial ATA II: Port Multiplier 1.0 Specification, April 29th, 2003.

(URL: http://www.serialdata.org retrieved on May 22, 2003)

Serial ATA International Organization: Serial ATA Revision 3.1, July 18, 2011,

(URL: http://www.serialdata.org)

Spinpoint M9T Product Manual REV 1.0

2

Image 8
Contents M9T Product Manual Page Table of Contents Iii Read Fpdma Queued 60h Read Log Extended 2Fh Read Long 22h Table of Tables Manual Organization ScopeUser Definition Sata ReferenceDescription IntroductionKey Features Standards and Regulations Hardware RequirementsSpecifications Specification SummaryPhysical Specifications Logical ConfigurationsPerformance Specifications Power consumption Power consumptionPower Requirements RatedEnvironmental Specifications Environmental SpecificationsLinear Shock 1/2 sine pulse Rotational ShockReliability Specifications Installation Space RequirementsUnpacking Instructions MountingMounting Dimensions OrientationSata Connectivity Cable ConnectorsVentilation Computer mainboard or Serial ATA host adapter Power ManagementSATA-Bus Interface Connector HDD Power, Sata Interface, and Factory Jumper ConnectorDrive Installation DC Power Connector and SATA-Bus Interface Cable ConnectionsHead / Disk Assembly HDA Base Casting AssemblyDC Spindle Motor Assembly Disk Drive OperationExploded Mechanical View Disk Stack Assembly Head Stack AssemblyVoice Coil Motor and Actuator Latch Assemblies Air Filtration SystemDisk Controller Digital Signal Process and Interface ControllerDrive Electronics DDR Host Interface Control Block Buffer Control BlockFrequency Synthesizer Disk Control BlockDisk Ldpc Control Block Power Management Read/Write ICTime Base Generator Automatic Gain ControlAnalog Anti-Aliasing Low Pass Filter Analog to Digital Converter ADC and FIRRead Channel Servo SystemRead and Write Operations Read Caching Firmware FeaturesWrite Channel Write Caching Defect Management Automatic Defect AllocationSmart 6 APMSata II Interface Sata TerminologySpinpoint M9T Product Manual REV Physical Interface Signal Summary Signal DescriptionsWhen read When written 2 I/O Register AddressControl Block Register Descriptions RegistersCommand Block Register Descriptions Command Register Ex F7h Device Register Ex F6hStatus Register Ex F7h Sata II Feature SET Device Activity SignalStaggered Spin-up Disable Control Auto-Activate in DMA Setup FISPhy Event Counters Software Settings Preservation Sata Power ManagementCommand Code Parameters ATA Command DescriptionsCommand Table Smart Command Descriptions Check Power Mode E5hDevice Configuration Overlay B1h Download Micro Code 92hDevice Configuration Identify data structure Word Content Execute Device Diagnostics 90h Diagnostic CodesFlush Cache E7h, EAh extended Format Track 50hContent Description Identify Device information=the fields reported in word 88 are valid EXT =Media Card Pass Through command feature set supported Word Content Description WWNIdle Immediate E1h Automatic Standby Timer PeriodsIdle E3h Initialize Device Parameters 91h NOP 00hRead Buffer E4h Read DMA C8h, 25h extendedRead Long 22h Read Multiple Command C4h, 29h extendedRead Log Extended 2Fh Read Verify Sectors 40h, 41h extended Read Native Max Address F8h, 27h extendedRead Sectors 20h, 24h extended Security Disable Password F6h Recalibrate 10hSecurity Erase Prepare F3h Security Erase Unit F4hSecurity Set Password F1h Security Erase Unit Password Word ContentSecurity Set Password data content Security Freeze Lock F5hSeek 7xh Set Features EFhSecurity Unlock F2h 11 Set Features Register Definitions 12 Transfer Mode ValuesSet Multiple Mode C6h 13 Set Max Feature Register ValuesSet Max Address F9h, 37h extended Sleep E6h14 Smart Feature Registers Values Smart disable operations D9hSmart enable/disable attribute auto-save D2h Smart B0hSmart enable operations D8h Smart execute off-line immediate D4hSmart read data D0h 15 Device Smart Data StructureByte Bit Name Description 16 Smart Attribute Status Flags17 Smart Attribute Data List 18 Off-line Data Collection Status ValuesSelf-test execution status byte 19 Self-test Execution Status ValuesSmart write log sector D6h Smart read log sector D5hSmart return status DAh Standby Immediate E0h Write Buffer E8hWrite DMA CAh, 35h extended Write Fpdma Queued 61hWrite Multiple Command C5h, 39h extended Write Sectors 30h, 34h extendedSpinpoint M9T Product Manual REV General Information MaintenanceMaintenance Precautions HDD handling guide -Please handle HDD by side surfaces Service and Repair HDD handling guide Prevent Shocks