Samsung manual Spinpoint M8 Product Manual REV

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CONTROL VARIABLE-The control variable, Z, is a flag that determines the code set to be used to interpret a data byte. The control variable has the value D (for data characters) or K (for control characters).

CRC-In Serial ATA a 32-bit CRC is calculated over the contents of a FIS. The Serial ATA CRC is the Dword in a frame that immediately precedes the EOF primitive.

DATA CHARACTER-A data character is a combination of a byte value with the control variable equal to D.

DWORD-A Dword is thirty-two (32) bits of data. A Dword may be represented as 32 bits, as two adjacent words, or as four adjacent bytes. When shown as bits the least significant bit is bit 0 and most significant bit is bit 31. The most significant bit is shown on the left. When shown as words the least significant word (lower) is word 0 and the most significant (upper) word is word 1. When shown as bytes the least significant byte is byte 0 and the most significant byte is byte 3.

DWORD SYNCHRINIZATION-The state in which a receiver has recognized the comma sequence and is producing an aligned data stream of Dwords (four contiguous bytes) from the zero-reference of the comma character.

ENCODED CHARACTER-An encoded character is the output of the 8b/10b encoder – the result of encoding a character. An encoded character consists of 10 bits, where bit 0 is the most significant bit and bit

9 is the least significant. The bits in an encoded character are symbolically referred to as “abcdeifghj” where “a” corresponds to bit 0 and “j” corresponds to bit 9.

ELASTICITY BUFFER-The elasticity buffer is a portion of the receiver where character slipping and/or character alignment is performed.

FIRST PARTY DMA ACCESS -First-party DMA access is a method by which a device accesses host memory.

FIRST PARTY DMA MODE (FPDMA) - A device which is operating in First-party DMA mode uses First- party DMA as a primary communications method between the host and the device. A software driver uses legacy mode commands to place the device into First-party DMA mode of operation. The legacy-mode command places the device into the First-party DMA mode of operation and the command protocol used between a device and host when in First-party DMA mode are not specified by this specification.

FIRST DATA PHASE- The FPDMA Data Phase is the period from the reception of a DMA Setup FIS until either the exhaustion of the associated data transfer count or the assertion of the ERR bit in the shadow Status register.

FIS-Stands for Frame Information Structure.

FRAME UNFIORMATION STRUCTURE-The user payload of a frame, does not include the SOF, CRC, and EOF delimiters.

Frame-A frame is an indivisible unit of information exchanged between a host and device. A frame consists of a SOF primitive, a Frame Information Structure, a CRC calculated over the contents of the FIS, and an EOF primitive-

LEGACY MODE-Legacy mo d e is the mode of operation which provides software-transparent communication of commands and status between a host and device using the ATA Command Block and Control Block registers.

LEGAL CHARACTER-Legal character is one for which there exists a valid decoding, either into the data character or control character fields. Due to running disparity constraints not all 10-bit combinations result in a legal character. Additional usage restrictions in Serial ATA result in a further reduction in the SATA defined control character space.

OOB SIGNAL DETECTOR-This block decodes Out of Band signal from the high speed input signal path.

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Contents M8 Product Manual Page Table of Contents Servo System Read and Write Operations Read Fpdma Queued 60h Read Log Extended 2Fh Read Long 22h Table of Tables User Definition ScopeManual Organization Reference SataIntroduction DescriptionKey Features Hardware Requirements Standards and RegulationsSpindle speed RPM RPM Class SpecificationsSpecification Summary SpecificationsPhysical dimensions Physical SpecificationsLogical Configurations Physical SpecificationsPerformance Specifications Rated Power consumptionPower consumption Power RequirementsEnvironmental Specifications Environmental Specifications15.0 Reliability Specifications Space Requirements InstallationMounting Unpacking InstructionsOrientation Mounting DimensionsMounting-Screw Clearance ClearanceVentilation Cable ConnectorsSata Connectivity Serial ATA Management PowerHDD Power, Sata Interface, and Factory Jumper Connector Pin Locations on the Drive Pcba DC Power Connector and SATA-Bus Interface Cable Connections Drive InstallationDisk Drive Operation Head / Disk Assembly HDABase Casting Assembly DC Spindle Motor AssemblyCoverAssembly Air Filtration System Disk Stack AssemblyHead Stack Assembly Voice Coil Motor and Actuator Latch AssembliesDrive Electronics Digital Signal Process and Interface ControllerDisk Controller DDR Buffer Control Block Host Interface Control BlockDisk Ldpc Control Block Disk Control BlockFrequency Synthesizer Automatic Gain Control Power ManagementRead/Write IC Time Base GeneratorAnalog to Digital Converter ADC and FIR Analog Anti-Aliasing Low Pass FilterRead and Write Operations Servo SystemRead Channel Write Channel Firmware FeaturesRead Caching Write Caching Smart Defect ManagementAutomatic Defect Allocation Multi-burst ECC CorrectionSata Terminology Sata II InterfaceSpinpoint M8 Product Manual REV Signal Descriptions Physical Interface Signal SummaryRegisters When read When written2 I/O Register Address Control Block Register DescriptionsDevice Control Register ex F6h Command Block Register DescriptionsFeatures Register and Feature Extended Register Ex F1h Error Register Ex F1hDevice Register Ex F6h Command Register Ex F7hStatus Register Ex F7h Auto-Activate in DMA Setup FIS Sata II Feature SETDevice Activity Signal Staggered Spin-up Disable ControlPhy. Event Counters Sata Power Management Software Settings PreservationCommand Table ATA Command DescriptionsCommand Code Parameters Check Power Mode E5h Command DescriptionsDownload Micro Code 92h Device Configuration Overlay B1hDevice Configuration Overlay Feature Register Values CommandDevice Configuration Identify data structure Word Content Format Track 50h Execute Device Diagnostics 90hDiagnostic Codes Flush Cache E7h, EAh extendedIdentify Device information Content Description=the fields reported in word 88 are valid EXT =Media Card Pass Through command feature set supported WWN Word Content DescriptionIdle E3h Automatic Standby Timer PeriodsIdle Immediate E1h Read DMA C8h, 25h extended Initialize Device Parameters 91hNOP 00h Read Buffer E4hRead Log Extended 2Fh Read Multiple Command C4h, 29h extendedRead Long 22h Read Sectors 20h, 24h extended Read Native Max Address F8h, 27h extendedRead Verify Sectors 40h, 41h extended Security Erase Unit F4h Security Disable Password F6hRecalibrate 10h Security Erase Prepare F3hSecurity Freeze Lock F5h Security Set Password F1hSecurity Erase Unit Password Word Content Security Set Password data contentSeek 7xh Set Features EFhIdentifier Level Command result Security Unlock F2h12 Transfer Mode Values 11 Set Features Register DefinitionsSleep E6h Set Multiple Mode C6h13 Set Max Feature Register Values Set Max Address F9h, 37h extendedSmart B0h 14 Smart Feature Registers ValuesSmart disable operations D9h Smart enable/disable attribute auto-save D2hSmart execute off-line immediate D4h Smart enable operations D8h15 Device Smart Data Structure Smart read data D0hData Structure Revision Number 16 Smart Attribute Status Flags Bit Name Description18 Off-line Data Collection Status Values 17 Smart Attribute Data List19 Self-test Execution Status Values Self-test execution status byteSmart return status DAh Smart read log sector D5hSmart write log sector D6h Write Fpdma Queued 61h Standby Immediate E0hWrite Buffer E8h Write DMA CAh, 35h extendedWrite Long 32h Write Multiple Command C5h, 39h extendedWrite Sectors 30h, 34h extended Spinpoint M8 Product Manual REV Maintenance Precautions MaintenanceGeneral Information HDD handling guide -Please handle HDD by side surfaces HDD handling guide Prevent Shocks Service and Repair