Texas Instruments TVP5147M1PFP manual Separate Syncs, 1. Output Format, Terminal, Name Number

Page 24

Functional Description

Table 2−1. Output Format

TERMINAL

TERMINAL

10-Bit 4:2:2

20-Bit 4:2:2

NAME

NUMBER

YCbCr

YCbCr

 

 

 

 

Y_9

43

Cb9, Y9, Cr9

Y9

 

 

 

 

Y_8

44

Cb8, Y8, Cr8

Y8

 

 

 

 

Y_7

45

Cb7, Y7, Cr7

Y7

 

 

 

 

Y_6

46

Cb6, Y6, Cr6

Y6

 

 

 

 

Y_5

47

Cb5, Y5, Cr5

Y5

 

 

 

 

Y_4

50

Cb4, Y4, Cr4

Y4

 

 

 

 

Y_3

51

Cb3, Y3, Cr3

Y3

 

 

 

 

Y_2

52

Cb2, Y2, Cr2

Y2

 

 

 

 

Y_1

53

Cb1, Y1, Cr1

Y1

 

 

 

 

Y_0

54

Cb0, Y0, Cr0

Y0

 

 

 

 

C_9

57

 

Cb9, Cr9

 

 

 

 

C_8

58

 

Cb8, Cr8

 

 

 

 

C_7

59

 

Cb7, Cr7

 

 

 

 

C_6

60

 

Cb6, Cr6

 

 

 

 

C_5

63

 

Cb5, Cr5

 

 

 

 

C_4

64

 

Cb4, Cr4

 

 

 

 

C_3

65

 

Cb3, Cr3

 

 

 

 

C_2

66

 

Cb2, Cr2

 

 

 

 

C_1

69

 

Cb1, Cr1

 

 

 

 

C_0

70

 

Cb0, Cr0

Table 2−2. Summary of Line Frequencies, Data Rates, and Pixel/Line Counts

 

PIXELS PER

ACTIVE PIXELS

LINES PER

PIXEL

COLOR

HORIZONTAL

STANDARDS

FREQUENCY

SUBCARRIER

LINE

PER LINE

FRAME

LINE RATE (kHz)

 

(MHz)

FREQUENCY (MHz)

 

 

 

 

 

 

 

 

 

 

 

 

601 sampling

 

 

 

 

 

 

 

 

 

 

 

 

 

NTSC-J, M

858

720

525

13.5

3.579545

15.73426

 

 

 

 

 

 

 

NTSC-4.43

858

720

525

13.5

4.43361875

15.73426

 

 

 

 

 

 

 

PAL-M

858

720

525

13.5

3.57561149

15.73426

 

 

 

 

 

 

 

PAL-60

858

720

525

13.5

4.43361875

15.73426

 

 

 

 

 

 

 

PAL-B, D, G, H, I

864

720

625

13.5

4.43361875

15.625

 

 

 

 

 

 

 

PAL-N

864

720

625

13.5

4.43361875

15.625

 

 

 

 

 

 

 

PAL-Nc

864

720

625

13.5

3.58205625

15.625

 

 

 

 

 

 

 

SECAM

864

720

625

13.5

Dr = 4.406250

15.625

Db = 4.250000

 

 

 

 

 

 

 

 

 

 

 

 

 

2.5.1 Separate Syncs

VS, HS, and VBLK are independently software programmable to a 1⋅ pixel count. This allows any possible alignment to the internal pixel count and line count. The default settings for 525-line and 625-line video outputs are given as examples below. FID changes at the same transient time when the trailing edge of vertical sync occurs. The polarity of FID is programmable by an I2C interface.

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TVP5147M1PFP

SLES140A—March 2007

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Contents Data Manual Important Notice Contents Section 11.11 Section 11.59 Example List of Illustrations List of Tables Introduction Detailed Functionality TVP5147M1 Applications Related ProductsOrdering Information Packaged DevicesFunctional Block Diagram Terminal Assignments PFP Package TOP ViewMiscellaneous Signals Terminal Functions−1. Terminal Functions Terminal Description Name NumberSync Signals VS/VBLK/GPIOIntroduction Video Input Switch Control Analog Processing and A/D ConvertersPGA ADCAnalog Input Clamping Automatic Gain ControlAnalog Video Output 5 A/D ConvertersDigital Video Processing 1 2⋅ Decimation FilterComposite Processor NTSC/PAL CVBS/C−10 − dB −20 −30 −40−50 −60 −70 −10Luminance Processing Color Transient ImprovementOUT Clock Circuits Real-Time Control RTCOutput Formatter Separate Syncs −1. Output FormatTerminal Name NumberLine 525 First Field Video VS Start FID VblkVblk Start 622 623 624 625 First Field Video VS Start Vblk Start 23 24 Vblk Stop 336 337Avid Stop Dataclk = 2⋅ Pixel Clock Mode Horizontal Blanking Cb0 Cr0 HS Start HS StopAvid Start −15. Horizontal Synchronization Signals for 20-Bit 422 Mode Avid Stop Dataclk = 1⋅ Pixel Clock ModeEmbedded Syncs I2C Host Interface−3. EAV and SAV Sequence D9 MSBReset and I2C Bus Address Selection Vbus Access2 I2C Operation −4. I 2C Host Interface Terminal DescriptionHost I2CVbus WSS VitcVBI Data Processor −6. Supported VBI SystemVBI System Standard Line Number Number of Bytes VBI Fifo and Ancillary Data in Video Stream −7. Ancillary Data Format and SequenceByte Description LSBReset and Initialization −9. Reset SequenceVBI Raw Data Output −8. VBI Raw Data Output FormatAdjusting External Syncs Register Name 2C Subaddress DefaultInternal Control Registers −10. I 2C Register SummaryVblk start line V bit control 75h 12h VCR trick mode control 76h −11. Vbus Register Summary −12. Analog Channel and Video Mode Selection Mode Inputs Selected Input Select Output HEXRegister Definitions Input Select RegisterAFE Gain Control Register Video Standard RegisterCvbs and S-Video Component Video Operation Mode Register Autoswitch Mask RegisterSubaddress 03h Default 00h Color Killer Register Luminance Processing Control 1 RegisterSubaddress 08h Default 02h Reserved Trap filter select Luminance Processing Control 2 RegisterLuminance Processing Control 3 Register Luminance Brightness RegisterLuminance Contrast Register Chrominance Saturation RegisterChroma Hue Register Chrominance Processing Control 1 RegisterSubaddress 0Eh Default Chrominance Processing Control 2 RegisterAvid Start Pixel Register WCFAvid Stop Pixel Register Hsync Start Pixel RegisterHsync Stop Pixel Register Vsync Start Line RegisterCTI Delay Register Vsync Stop Line RegisterVblk Start Line Register Vblk Stop Line RegisterSubaddress 2Eh Default 00h CTI coring CTI gain CTI Control RegisterSync Control Register Subaddress 33h Default 40h Output Formatter 1 RegisterOutput Formatter 2 Register CbCr code ReservedOutput Formatter 3 Register Output Formatter 4 Register Output Formatter 5 Register Subaddress 39h Default 00h Output Formatter 6 RegisterClear Lost Lock Detect Register Status 1 Register Read onlyStatus 2 Register AGC Gain Status RegisterColor killed Subaddress 3Ch Fine gain 3Dh Coarse gainVideo Standard Status Register Gpio Input 1 RegisterGpio Input 2 Register Glco FIDSubaddress 46h Default 20h Cgain 1 Reserved Subaddress 47h Default 20h Cgain 2 ReservedAFE Coarse Gain for CH 1 Register AFE Coarse Gain for CH 2 RegisterSubaddress 48h Default 20h Cgain 3 Reserved Subaddress 49h Default 20h Cgain 4 ReservedAFE Coarse Gain for CH 3 Register AFE Coarse Gain for CH 4 RegisterAFE Fine Gain for Pb Register AFE Fine Gain for YChroma RegisterAFE Fine Gain for Pr Register Subaddress 57h Default 00h AFE Fine Gain for CVBSLuma RegisterField ID Control Register FID controlSubaddress 69h Default 00h Bit modeReg 69h Reg 75h Mode Standard LPF Nonstandard LPF Bit Bit and V-bit Control 1 RegisterBack-End AGC Control Register AGC Decrement Speed Control RegisterROM Version Register Subaddress 74h Default 00h Luma peak a AGC White Peak Processing RegisterLuma peak B Composite peak V Bit Control Register Lines per frame BitVCR Trick Mode Control Register AGC Increment Delay RegisterHorizontal Shake Increment Register AGC Increment Speed RegisterAnalog Output Control 1 Register Chip ID MSB RegisterChip ID LSB Register Cpll Speed Control RegisterAGC Decrement Delay Register Status Request RegisterVertical Line Count Register VDP TTX Filter And Mask Registers VDP TTX Filter Control Register VDP Fifo Word Count Register NibbleFilter PassVDP Fifo Reset Register VDP Fifo Interrupt Threshold RegisterVDP Fifo Output Control Register VDP Line Number Interrupt RegisterVDP Global Line Mode Register VDP Pixel Alignment RegisterVDP Line Start Register VDP Line Stop RegisterVDP Full Field Enable Register VDP Full Field Mode RegisterVbus Data Access With No Vbus Address Increment Register Vbus Data Access With Vbus Address Increment RegisterVbus Address Access Register Fifo Read Data RegisterInterrupt Raw Status 0 Register Fifo Thrs TTX WSS VPS Vitc CC F2 CC F1Interrupt Raw Status 1 Register Interrupt Status 0 RegisterReserved Lock Fifo fullInterrupt Status 1 Register Interrupt Mask 0 Register Subaddress F5h Default 00h Interrupt Mask 1 RegisterInterrupt Clear 0 Register Subaddress F7h Default 00h Interrupt Clear 1 RegisterVbus Register Definitions VDP Closed Caption Data RegisterVDP WSS Data Register Subaddress ByteVDP Vitc Data Register VDP V-Chip TV Rating Block 1 RegisterVDP V-Chip TV Rating Block 2 Register VDP V-Chip TV Rating Block 3 Register VDP V-CHIP Mpaa Rating Data RegisterNone TV-PGVDP General Line Mode and Line Address Register Default line mode = FFh, address = 00hVDP VPS/Gemstar Data Register VPS Read onlyInterrupt Configuration Register Analog Output Control 2 RegisterCrystal Specifications Crystal Specifications MIN NOM MAX UnitAbsolute Maximum Ratings† Recommended Operating ConditionsElectrical Characteristics DC Electrical Characteristics see NoteAnalog Processing and A/D Converters Parameter Test Conditions MIN TYP MAX UnitTiming Dataclk AVID, VS, HS, FIDVOH VOL VC1 SDA VC0 SCLElectrical Specifications Recommended Settings ExampleAssumptions Assumptions Example Register Settings Example Register Settings Application Example −1. Example Application CircuitDesigning With PowerPADt Devices Orderable Device Status Package Pins Package Eco Plan MSL Peak TempQty Page

TVP5147M1PFP specifications

The Texas Instruments TVP5147M1PFP is a versatile video decoder that stands out in the realm of analog video processing. This device is particularly designed for high-quality video applications, making it an excellent choice for a variety of consumer and professional electronics that require reliable video decoding capabilities.

One of the main features of the TVP5147 is its ability to decode multiple video formats, including NTSC, PAL, and SECAM. This flexibility allows the decoder to seamlessly interface with various video sources from different geographic regions, providing a global solution for video applications. The TVP5147 includes advanced synchronization features, ensuring it can effectively handle video signals that may vary in timing and quality.

The device is equipped with a sophisticated 10-bit analog-to-digital converter (ADC), which enhances the precision and clarity of the digital video output. This high-resolution capability allows for improved color accuracy and detail, leading to a more lifelike video representation. Additionally, the TVP5147 utilizes advanced digital processing technologies, including noise reduction and image enhancement features, contributing to outstanding image quality even in less than ideal input conditions.

Another notable characteristic of the TVP5147M1PFP is its support for various output formats, including ITU-R BT.601 and 656, which facilitates easy integration into different systems. The device can also provide various output resolutions, catering to the needs of diverse applications ranging from standard definition to high definition displays.

In terms of connectivity, the TVP5147 offers multiple input options, including composite video, S-video, and component video interfaces. This versatility ensures that it can accommodate a wide range of video sources, from traditional VHS players to modern digital cameras. Furthermore, the integrated video control features allow for easy adjustment of parameters such as brightness, contrast, and saturation.

The power consumption of the TVP5147M1PFP is optimized for low-energy applications while maintaining high performance, making it suitable for battery-powered devices and energy-efficient designs. Overall, the Texas Instruments TVP5147M1PFP is an exceptional video decoder that blends flexibility, high quality, and advanced technology, making it a preferred choice for video processing in numerous consumer and industrial applications. Its combination of features ensures reliable performance and high-quality output, fulfilling the demands of modern multimedia environments.
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