BenQ PE8700 service manual

Page 23

Table 3: EDTV and HDTV Timing supported by component (YPBPR) and RGBHV Input

Index

Format

Line

Pixel

Frame

Line

Line

Frame

Frame

H back

H sync

V back

V sync

 

name

Rate

Rate

Rate

active

total

active

total

porch

width

porch

width

 

 

(kHz)

(MHz)

(HZ)

(pixel)

(pixel)

(line)

(line)

(pixel)

(pixel)

(line)

(line)

 

 

 

 

 

 

 

 

 

 

 

 

 

1

480i

15.734

13.5

59.94

720

858

480

525

59

63

30

6

 

 

 

 

 

 

 

 

 

 

 

 

 

2

576i

15.625

13.5

50

720

864

576

625

68

64

39

5

 

 

 

 

 

 

 

 

 

 

 

 

 

3

480p

31.469

27

59.94

720

858

480

525

59

63

30

6

 

 

 

 

 

 

 

 

 

 

 

 

 

4

576p

31.25

27

50

720

864

576

625

68

64

39

5

 

 

 

 

 

 

 

 

 

 

 

 

 

5

720p50

37.5

74.25

50

1280

1980

720

750

260

40

20

5

 

 

 

 

 

 

 

 

 

 

 

 

 

6

720p59

44.955

74.176

59.94

1280

1650

720

750

260

40

20

5

 

 

 

 

 

 

 

 

 

 

 

 

 

7

720p60

45

74.25

60

1280

1650

720

750

260

40

20

5

 

 

 

 

 

 

 

 

 

 

 

 

 

8

1080i25

28.125

74.25

25

1920

2640

1080

1125

148

44

15

5

 

 

 

 

 

 

 

 

 

 

 

 

 

9

1080i29

33.716

74.176

29.97

1920

2200

1080

1125

192

44

15

5

 

 

 

 

 

 

 

 

 

 

 

 

 

10

1080i30

33.75

74.25

30

1920

2200

1080

1125

192

44

15

5

 

 

 

 

 

 

 

 

 

 

 

 

 

22

Image 23
Contents DLP Projector Contents Servicing Precautions Safety PrecautionsMinimum Engineering SpecificationPage Hdtv IEC Vcci General requirements ContentAppendix a Optical Measurement A1. Brightness Practical considerationA2. Brightness Uniformity A5. Peak Contrast A9. Zoom Ratio Test Summary Appendix B Design Verification Test ProcedurePurpose Test Order DefinitionAppendix C Drawings and Attachments Page Appendix D HD2 Front Projection Image Quality Specification Black test screen Gray 6 test screenGray 10 test screen White test screen· Refer to for acceptance criteria, in specified order Red Ramp test screenTest Conditions as tested in OEM projector Image Quality Specification Appendix E Supporting Timings Support Timings by DVI-I Input Analog or Digital PC signalsPage Projector PE8700 99.J5877.B21 Spare Parts ListBNC Black DiagramPackaging Description Appearance Description Page Equipment Alignment ProcedureProcedure OSD Default value used for color delay alignmentSelect Save Setting at Factory OSDFactory OSD Default value used for DVI-Analog color alignment Offset adjustment at low brightness AD R, G, B offset Procedure Black Level Adjustment DLP brightnessWhite Level Adjustment AD contrast---R,G,B gain YPbPr Component Equipment User setupwhite C15400k C26500k C37500kOSD Default value used for Ypbpr color alignment Gray Level AD Ypbpr Contrast, Brightness Procedure Pbpr Offset adjustment AD PB, PR OffsetSaturation Level Scalar Case x1x0 & y1 y0 Factory SD User setupwhite C15700k C26500k C39300kSaturation Level Gray Level for Ycbcr Component ProcedureAdditional Patterns used for color final check OSD Default value Value USERPictureProcedure Gray Level Gray Level for Composite Video & S-Video EquipmentSystem trouble shooting Trouble Shooting GuideYES Main board trouble shootingSIL504 trouble shooting U4, U2 CPU U10 trouble shooting guide YES DMD board trouble shooting guideOK? Connector board trouble shooting guidePower board trouble shooting guide 鐐 衒 蘠 耟  鞤 矏 矏 耟 礼袨 蘠 醥 袓 藜 耟  韗 齇 耟  斉 鞥 觖 罿 蘠 韘 篧 蚴 礼  誜 袨 鷘 矏 篧 袨 ゾ 篧 礼 榢 譗 む 鞥 觖蛂 豽 袕 む 醥 藜 罿袨 矏 篧 ソ 譂 Factory Factory OSD OperationSTD Adj HD AdjColor Balance Filter Bypass Pattern1 DLPPattern3 Pattern2Test Mode Firmware Upgrade Procedure Page 12. RS232 Codes Page X00 Must be Reversed , no function X57 Picture by picture display Page Following is the list of Y-group Page ACK = Y1Y Page Page Page Mcureset Trigger Dvdoreset DeintdoneMcureset OpenableBenq Corporation DIIN4 DIIN8DIIN9 DIIN6 DIIN732DETECT ResetdvdoInterlacedetect CLK54 22DETECTBenq Corporation CP UD0 CP UD1 RM1OP EnableRM1CLKIN WIRETP31 MEMDQ14 WIRETP30CP UD0 CPUS2 Resetn CPUA3 Cpurdn Resetn SDA SCLResetvcc Powerontest Resetvcc CPUA8WIRETP46 INLTCH27 WIRETP53WIRETP52 INLTCH25 WIRETP51 INLTCH26This PIN only for Test MEMDQ14 MEMDQ49 MEMDQ31 MEMDQ0MEMDQ15 MEMDQ48 MEMDQ30 MEMDQ1Cwindex Circuit FLADDR16 FLADDR12U2C CTMN1M CTM1MP2P5VIN Screw HolesScrlr DDAN10 DDAN11 DDAN12 DDAN13 DDAN14 DDAN15DAD1000 SSI Color Wheel Drive Circuit Benq Corporation 500 OHM Vsync HSB Bnchs 1CAPP+Capp CAPVoltage level of CB/CR is Adrin ADR0Datack Hsout Sogout VsoutInta ResetScin CR1IN CB 1IN Sogy Sogyin Sogrca Racin1TURN on Larry Lin1 Dviscl DVISCL3V Dvisda DVISDA3V Hsdjtr R101 ResetzdviResetzdvi RES Oclk INV RESETR111
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